Commit Graph

11485 Commits

Author SHA1 Message Date
Tim Newsome 82ed02f92a target/riscv: Always clear progbuf cache in examine().
When a DM was powered down, we end up in examine() again, and clearly if
the DM was powered down we need to invalidate that cache.

Change-Id: I5eb6a289939f313e06c09cac22245db083026aa3
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-05-26 13:00:13 -07:00
Tim Newsome 1c5cf8023c target/riscv: Reset DTM when it reports an error.
The error state is sticky, so this has to be done to recover.

Change-Id: I589f3cdab0f2351fd25f89951830cbc16c39bd93
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-05-26 13:00:13 -07:00
Tim Newsome c8e7e3535c
Merge pull request #842 from en-sc/en-sc/optimize-access
target:riscv: optimize register accesses
2023-05-25 09:34:49 -07:00
Evgeniy Naydanov 5a29a7399f target/riscv: refactor register accesses
Change-Id: I45731d501f6261c4142c70afacf3fbbe42cf2806
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-05-23 20:20:19 +03:00
Evgeniy Naydanov c822dc8194 target/riscv: improve register caching (prep_*, cleanup_*)
Introduce riscv_write_register to prep_for_register/vector_access and
cleanup_after_register/vector_access.

Change-Id: I77a0a06ac6f12eceec309f0aff94aa77bd56ff55
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-05-22 11:55:37 +03:00
Evgeniy Naydanov 8f3a617dc7 target/riscv: improve register caching (riscv_write_register)
This commit introduces a new function, which can be used to reduce number
of register accesses.

Change-Id: I125809726eb7797b11121175c3ad66bedb66dd0d
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-05-22 11:55:37 +03:00
Evgeniy Naydanov 7a181e8bbc target/riscv: use `riscv_reg_t` and `enum gbb_regno` consistently
Change-Id: Ia476251e835fa5fd129ae6b679c6049c5c60c716
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-05-22 11:55:37 +03:00
Evgeniy Naydanov 919a98a05b target/riscv: fix register cache flushing
Since writing a register can make some GPRs dirty (e.g. S0, S1), registers
should be flushed in reverse order, so GPRs are flushed last.

Change-Id: Ice352a4df4ae064619c0f9905db634a7b57e4711
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-05-22 11:55:37 +03:00
Jan Matyas 431deec8c9
Multiple improvements to Spike smoke-test workflow (#809)
* Multiple improvements to Spike smoke-test workflow

These changes have been made:

- use checkout action v3 (not v2) - silences a Github warning
- cache dependencies to speed-up the process (Spike + toolchain)
- reorder actions so that cached items are handled first
- move dependencies to /opt/riscv for easier caching
- archive logs from the tests (downloadable artifact)
- more descriptive names for some steps
- changed 'apt' to 'apt-get' to supress a warning

Change-Id: I5b8e9200c5d8cbaa3116bac565e009089bb6b36b
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>

* Split cache for spike and toolchain

Change-Id: I423c4ba28e44ec5126786897135fb245e164c664
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>

* Split cache for spike and toolchain - fix cache keys

Change-Id: I907bdb52f402b17a7829ea1d06cd395518de4cd3
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>

* Empty commit to re-trigger the CI

Change-Id: I749d44d8f0dde09ce5adf6e2e1ab5a5324f4018f
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>

---------

Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
Co-authored-by: Jan Matyas <jan.matyas@codasip.com>
2023-05-18 14:15:54 -07:00
Tim Newsome 461eb65e21
Merge pull request #847 from riscv/data1_cache
target/riscv: Comment that data1 might change.
2023-05-18 10:56:00 -07:00
Tim Newsome be5187d0a8 target/riscv: Comment that data1 might change.
In case in the future I have the same idea of optimizing progbuf writes
again.

Change-Id: Ie383487691cceeff75e2c22f4c85fc1fe4873937
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-05-17 09:46:23 -07:00
Tim Newsome 0a38258f71
Merge pull request #848 from riscv/removed-unused-func-set-frontend-running
gdb_server: Removed unused function gdb_set_frontend_state_running
2023-05-16 09:28:14 -07:00
Tim Newsome d78d991191
Merge pull request #850 from riscv/cleanup-in-target-c
Minor cleanup in target.c
2023-05-16 09:27:57 -07:00
Tim Newsome 15bd33cc20
Merge pull request #844 from riscv/from_upstream
Merge 228fe7 from upstream
2023-05-15 08:17:31 -07:00
Jan Matyas bd275ef483 Minor cleanup in target.c
Small cleanup in target.c to get rid of few upstream differences:

- removed a pointless check for `reg->exists` - already checked
  few lines above
- unify one log message with what's in upstream

Change-Id: I3fd761157382670611fa90de84e2dfc90192f473
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2023-05-15 15:09:55 +02:00
Jan Matyas 528970c47a gdb_server: Removed unused function gdb_set_frontend_state_running
Non-functional change: unused function removed that does not exist
in the OpenOCD upstream, either.

Change-Id: Ibeab5b41a24183673cc02ca919b2f7285309e6f4
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2023-05-15 12:38:02 +02:00
Tim Newsome e02c83e401
Merge pull request #846 from riscv/cleanup
target/riscv: Remove non-functional code in riscv_program_exec().
2023-05-11 10:27:46 -07:00
Tim Newsome 57d20e4d96 target/riscv: Remove non-functional code in riscv_program_exec().
Addresses #845.

Change-Id: If4eee383f92946669a84f92e52a3ac3600707525
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-05-10 16:58:09 -07:00
Tim Newsome da44fb5407 Merge commit '228fe7300c7df7aa05ba2c0bc19edde6d0156401' into from_upstream
Conflicts:
	doc/openocd.texi
	src/jtag/aice/aice_pipe.c
	src/jtag/aice/aice_usb.c
	src/rtos/FreeRTOS.c
	src/rtos/hwthread.c
	src/rtos/rtos_standard_stackings.c
	src/target/riscv/riscv.c

Change-Id: I0c6228c499d60274325be895fbcd8007ed1699bc
2023-05-04 14:38:10 -07:00
Tim Newsome 80d529cad3
Merge pull request #843 from riscv/hypervisor_translate
target/riscv: Support hypervisor address translation
2023-05-04 09:52:54 -07:00
Tim Newsome 880fa0a8da target/riscv: Support VS-stage and G-stage address translation.
These are used in hypervisor mode.

Change-Id: I5f773816f73c83b4ae57727fbc3b36b65b6185eb
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-04-28 14:48:49 -07:00
Tim Newsome fc52bfefc8
Merge pull request #840 from aap-sc/aap-sc/resume_on_bp
fix bp handling during resume
2023-04-28 09:13:58 -07:00
Tim Newsome 70380dda80
Merge pull request #841 from aap-sc/aap-sc/error_handling_fixup
target/riscv: respect error code from dm013_select_target in select_prepped_harts
2023-04-27 09:04:41 -07:00
Parshintsev Anatoly 152ef1a936 fix bp handling during resume
Depending client parameters OpenOCD resume command can do step+resume
to avoid triggering a pending breakpoint

Change-Id: Ib7ae544e1a1f13843584f4c1c87db17851642b89
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
2023-04-27 10:06:08 +03:00
Tim Newsome d4429f62e4 target/riscv: Refactor to create riscv_effective_privilege_mode()
Change-Id: I65bba63a7bde746b0069133f8a42529d1d857d3e
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-04-25 10:58:24 -07:00
Tim Newsome 5da1e086b6 target/riscv: Move some code from riscv_address_translate() to riscv_virt2phys()
Also minor code cleanups, and better debug messages.

Change-Id: Iffc9951c8b38da2e3516926108b93db91883680e
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-04-25 10:35:12 -07:00
Tim Newsome 85f44fc37f Comment pte_shift
Change-Id: I48ad7637ff37898ca2df0f48501cf2c72fa1e722
2023-04-25 09:34:27 -07:00
Tim Newsome f2c2ebbcd0 target/riscv: Add constants for vsatp, hgatp
Change-Id: I130a8f7a7abc294bbdf60e7e0ce0bccb72bf920a
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-04-25 09:30:27 -07:00
Parshintsev Anatoly 7ca8350d3a target/riscv: respect error code from dm013_select_target in select_prepped_harts
Change-Id: I3099589521538590e366d60629e49cfc74e2d0c6
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
2023-04-24 21:15:56 +03:00
Tomas Vanek 0384fe5d59 doc: drop "resume will wait 5 seconds"
Checkpatch-ignore: GIT_COMMIT_ID

Waiting for running state was removed from handle_resume_command()
in commit a92d27afb0 ("very long and bad structured commit msg
without anything relevant to resume") around year 2008.
Update the doc accordingly.

Silent checkpatch or we have to copy 10 or more lines
of the old commit msg.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I3296cb2c29cf80aeed63eddd8fbf352edec778c1
Reviewed-on: https://review.openocd.org/c/openocd/+/7579
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-14 15:12:11 +00:00
Daniel Anselmi ffd9638bdb tcl: cpld/xilinx-xc7: remove virtex-7 devices with ir-length > 6
They have an ir length of 22, 24 or 38 bit and different command codes.

Change-Id: I488e8613f1c4d017e1590111f60b2725ec62964b
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7387
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-14 15:11:33 +00:00
Daniel Anselmi e87fa5e3ab tcl: zynq_7000: add missing id codes
Add missing ID codes and ignore the version in the ID.

Change-Id: Idd2d3a5eddb6995f3af1c45afd2adf76ce3442bf
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7386
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-04-14 15:08:34 +00:00
Tim Newsome 4d274298b2
workflow: Run checkpatch against diff with riscv (#822)
* workflow: Run checkpatch against pull request only

Instead of arbitrarily picking 20 changes.

Change-Id: I5ec488aa4faa0b06056aa91d0432cda1674967b7
Signed-off-by: Tim Newsome <tim@sifive.com>

* Display FETCH_HEAD in the log

Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>

---------

Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
2023-04-13 08:38:59 -07:00
Tim Newsome 92dd9eed71
Preserve artifact of Linux build, too. (#828)
* Preserve artifact of Linux build, too.

That can be handy to e-mail to people who don't have a build setup.

Change-Id: I7b7e2d6f0033edf71f53211168f74b80ada64b97
Signed-off-by: Tim Newsome <tim@sifive.com>

* workflow: Run Linux build on Ubuntu 20.04, which is LTS.

This makes the binaries more useful.

Change-Id: I0cf6df68f03c4161222baa222c466fe0004ea769
Signed-off-by: Tim Newsome <tim@sifive.com>

* Use checkoutv3

Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>

---------

Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
2023-04-12 08:41:47 -07:00
Tim Newsome c454db3eee
Merge pull request #835 from en-sc/en-sc/fix-err-resume
target/riscv: Handle error code in resume_prep
2023-04-11 09:54:47 -07:00
Tim Newsome da229508aa
Merge pull request #833 from zqb-all/read_log128
target/riscv: support log memory access128 for read
2023-04-11 09:53:48 -07:00
Evgeniy Naydanov 08df077083 target/riscv: Handle error code in resume_prep
If hart can't change pc (e.g. it is running), resume command should
fail.

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: I14627366d574d806ea16262b7d305d8161f8bcc2
2023-04-10 17:19:20 +03:00
Mark Zhuang aa7344225b target/riscv: support log memory access128 for read
Change-Id: I9235150fa00c03a1d75d0b44a7500758daa56e2b
Signed-off-by: Mark Zhuang <mark.zhuang@spacemit.com>
2023-04-10 09:48:48 +08:00
Antonio Borneo 561f27fde9 helper/compiler fix build with gcc on MacOS
On MacOS libc includes files from MacOSX.sdk that define the macro
	#define __nonnull
without arguments, causing compile error.

Extend the existing check for clang on MacOS and undefine the
macro for gcc too.

Change-Id: Ic99de78348c6aa86561212a3aded9342e5d32e02
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7571
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Tested-by: jenkins
2023-04-07 22:56:27 +00:00
Daniel Anselmi 7e0797d19a ipdbg: whitespaces
Change-Id: I9294c551cf2e795ad5e3e92dc3926c564424e067
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7399
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-07 21:49:52 +00:00
Antonio Borneo c8de1b82ec helper/list: re-align with Linux kernel 6.3-rc1
Minor changes due to kernel switch to 100 char/line.
Added four new functions.

Silent checkpatch; we don't want to diverge from Linux reference
code.
Checkpatch-ignore: MACRO_ARG_REUSE, UNNECESSARY_PARENTHESES
Checkpatch-ignore: MACRO_ARG_PRECEDENCE

Change-Id: I1d2ff25bf3bab8cd0f5c9be55c7501795490ea75
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7568
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-04-07 21:47:34 +00:00
Antonio Borneo 90ce9da644 helper/list: remove unused hlist_*
The file list.h is taken from Linux and includes two similar
implementation of double linked lists:
- with single linked list's head (hlist_*), and
- with double linked list's head (list_*).
While the former offers a minor memory footprint improvement,
keeping two implementations makes harder for newbie developers
to approach them.

So far only the latter implementation has been used and no new
patches in gerrit is going to change that.

Drop the support for lists with single linked head.
It can be easily taken back from git history, if needed.

Change-Id: I420e5de38ab755fdfbeb2115538c61818308ec2b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7567
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-04-07 21:47:13 +00:00
François LEGAL 55e04e3157 src/target/mips_m4k : add fast read method
Add the fast read method to speed up flash verification
after programming. Works the same as fast write already
implemented.

Signed-off-by: François LEGAL <devel@thom.fr.eu.org>
Change-Id: I74611a3542a88212f0483ec8ee368aba3d1f03c7
Reviewed-on: https://review.openocd.org/c/openocd/+/7564
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-07 21:46:36 +00:00
François LEGAL 18aacc8bf3 src/target/mips_m4k : fix condition on overlapping workspace data area
The condition to check if the workspace area (used by actual MIPS code
executed on target) and data area (sandbox to put data to be read/written
to/from flash) is wrong, thus preventing the use of FAST_* commands to
program/verify FLASH.

Signed-off-by: François LEGAL <devel@thom.fr.eu.org>
Change-Id: Ic68424b7f42d44e550433a120093db5e7980fd56
Reviewed-on: https://review.openocd.org/c/openocd/+/7563
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-04-07 21:45:18 +00:00
Chao Du 41037eb265 rtos/FreeRTOS: some optimization of freertos_update_threads()
1.
update the rtos->thread_count in time, to make sure the allocated
thread_name_str and extra_info_str could be freed by
rtos_free_threadlist(). Otherwise the abnormal return may cause a
memory leak.
2.
remove a redundant assignment to threadid.

Signed-off-by: Chao Du <duchao@eswincomputing.com>
Change-Id: Ifabc59d501c925b3d6aec8b04b2856d2c31cc4e2
Reviewed-on: https://review.openocd.org/c/openocd/+/7549
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-07 21:44:31 +00:00
Tim Newsome 0c76e263e3
Merge pull request #823 from panciyan/riscv
target/riscv: leaf PTE check PTE_W missing
2023-04-07 10:05:57 -07:00
Tim Newsome 15bb3e23b8
Merge pull request #821 from en-sc/en-sc/fix-reset-mharts
target/riscv: simplify reset for rtos harts
2023-04-06 09:54:15 -07:00
Tim Newsome 52b102318b
Merge pull request #830 from zqb-all/csr_32bit
target/riscv: set some csr size to 32
2023-04-06 09:40:59 -07:00
Tim Newsome 21d2787d64
Merge pull request #825 from riscv/hypervisor
target/riscv: Set hypervisor bits.
2023-04-05 14:57:57 -07:00
Tim Newsome 7e36bb6158
Merge branch 'riscv' into hypervisor
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-04-05 10:48:56 -07:00