interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

target/riscv: Always clear progbuf cache in examine(). 

When a DM was powered down, we end up in examine() again, and clearly if
the DM was powered down we need to invalidate that cache.

Change-Id: I5eb6a289939f313e06c09cac22245db083026aa3
Signed-off-by: Tim Newsome <tim@sifive.com>
This commit is contained in:
Tim Newsome 2023-05-09 11:14:15 -07:00
parent 1c5cf8023c
commit 82ed02f92a
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/target/riscv/riscv-013.c
View File

@ -1623,10 +1623,10 @@ static int examine(struct target *target)
dmi_write(target, DM_DMCONTROL, 0);
dmi_write(target, DM_DMCONTROL, DM_DMCONTROL_DMACTIVE);
dm->was_reset = true;
/* The DM gets reset, so forget any cached progbuf entries. */
riscv013_invalidate_cached_debug_buffer(target);
}
/* We're here because we're uncertain about the state of the target. That
* includes our progbuf cache. */
riscv013_invalidate_cached_debug_buffer(target);
dmi_write(target, DM_DMCONTROL, DM_DMCONTROL_HARTSELLO |
DM_DMCONTROL_HARTSELHI | DM_DMCONTROL_DMACTIVE |