This is the only way the spec guarantees that GPRs are accessible, and
depending on the implementation this might be the only way that CSRs are
accessible.
Also changed the debug code that parses out DMI fields to be simpler to
maintain (albeit a little slower).
riscv013_execute_debug_buffer() now automatically clears cmderr if the
command fails. That feels like the right behavior. (It does return the
error to its caller.)
When first connecting to a target, have the debugger disable any
hardware triggers that are set by a previously connected debugger.
The 0.11 code already did this, but 0.13 did not.
To achieve this I decided to share the code to enumerate triggers
between 0.11 and 0.13, which required me to implement get_register() and
set_register() for 0.11, which made the whole change a lot larger than
you might have guessed.
Hopefully this sets us up to in the future share the code to set/remove
triggers as well.
Now that we're supporting non-RTOS multi-hart mode there's some more
assertions that you're running on the right hart. Those assertions
aren't sane very early in examine, so I avoid them.
Rather than having a bunch of "if rtos" stuff, I now just check "if
hart_enabled". This makes some code paths cleaner, all of which were
buggy in the non-RTOS multi-hart mode.
Main change is to make riscv_addr_t be unsigned. The rest is mechanical
fixing of types, print statements, and a few signed/unsigned compares.
Smoketest indicates everything is working more or less as before.
This is a major rewrite of the RISC-V v0.13 OpenOCD port. This
shouldn't have any meaningful effect on the v0.11 support, but it does
add generic versions of many functions that will allow me to later
refactor the v0.11 support so it's easier to maintain both ports. This
started as an emergency feature branch and went on for a long time, so
it's all been squashed down into one commit so there isn't a big set of
broken commits lying around. The changes are:
* You can pass "-rtos riscv" to the target in OpenOCD's configuration
file, which enables multi-hart mode. This uses OpenOCD's RTOS
support to control all the harts from the debug module using commands
like "info threads" in GDB. This support is still expermental.
* There is support for RV64I, but due to OpenOCD limitations we only
support 32-bit physical addresses. I hope to remedy this by rebasing
onto the latest OpenOCD release, which I've heard should fix this.
* This matches the latest draft version of the RISC-V debug spec, as of
April 26th. This version fixes a number of spec bugs and should be
close to the final debug spec.
Tim Newsome
Palmer Dabbelt
Dmitry Ryzhov
Megan Wachs