Set hardware triggers on all harts.
Right now we're using "threads" to represent harts. gdb/OpenOCD assume there's only one set of hardware breakpoints among all threads. Make it so.
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10518351bb
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9cd98058a0
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@ -579,6 +579,10 @@ static int register_write_direct(struct target *target, unsigned number,
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uint64_t value)
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{
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struct riscv_program program;
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LOG_DEBUG("[%d] reg[0x%x] <- 0x%" PRIx64, riscv_current_hartid(target),
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number, value);
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riscv_program_init(&program, target);
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riscv_addr_t input = riscv_program_alloc_d(&program);
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@ -641,7 +645,8 @@ static int register_read_direct(struct target *target, uint64_t *value, uint32_t
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*value = 0;
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*value |= ((uint64_t)(riscv_program_read_ram(&program, output + 4))) << 32;
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*value |= riscv_program_read_ram(&program, output);
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LOG_DEBUG("register 0x%x = 0x%" PRIx64, number, *value);
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LOG_DEBUG("[%d] reg[0x%x] = 0x%" PRIx64, riscv_current_hartid(target),
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number, *value);
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return ERROR_OK;
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}
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@ -794,6 +799,14 @@ static void deinit_target(struct target *target)
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static int add_trigger(struct target *target, struct trigger *trigger)
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{
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riscv013_info_t *info = get_info(target);
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// While we're using threads to fake harts, both gdb and OpenOCD assume
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// that hardware breakpoints are shared among threads. Make this true by
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// setting the same breakpoints on all harts.
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// Assume that all triggers are configured the same on all harts.
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riscv_set_current_hartid(target, 0);
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maybe_read_tselect(target);
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int i;
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@ -817,41 +830,58 @@ static int add_trigger(struct target *target, struct trigger *trigger)
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continue;
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}
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// address/data match trigger
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tdata1 |= MCONTROL_DMODE(riscv_xlen(target));
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tdata1 = set_field(tdata1, MCONTROL_ACTION,
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MCONTROL_ACTION_DEBUG_MODE);
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tdata1 = set_field(tdata1, MCONTROL_MATCH, MCONTROL_MATCH_EQUAL);
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tdata1 |= MCONTROL_M;
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if (info->misa & (1 << ('H' - 'A')))
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tdata1 |= MCONTROL_H;
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if (info->misa & (1 << ('S' - 'A')))
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tdata1 |= MCONTROL_S;
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if (info->misa & (1 << ('U' - 'A')))
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tdata1 |= MCONTROL_U;
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if (trigger->execute)
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tdata1 |= MCONTROL_EXECUTE;
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if (trigger->read)
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tdata1 |= MCONTROL_LOAD;
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if (trigger->write)
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tdata1 |= MCONTROL_STORE;
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register_write_direct(target, GDB_REGNO_TDATA1, tdata1);
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uint64_t tdata1_rb;
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register_read_direct(target, &tdata1_rb, GDB_REGNO_TDATA1);
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LOG_DEBUG("tdata1=0x%" PRIx64, tdata1_rb);
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for (int hartid = 0; hartid < riscv_count_harts(target); ++hartid) {
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riscv_set_current_hartid(target, hartid);
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if (tdata1 != tdata1_rb) {
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LOG_DEBUG("Trigger %d doesn't support what we need; After writing 0x%"
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PRIx64 " to tdata1 it contains 0x%" PRIx64,
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i, tdata1, tdata1_rb);
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register_write_direct(target, GDB_REGNO_TDATA1, 0);
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continue;
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if (hartid > 0) {
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register_write_direct(target, GDB_REGNO_TSELECT, i);
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}
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// address/data match trigger
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tdata1 |= MCONTROL_DMODE(riscv_xlen(target));
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tdata1 = set_field(tdata1, MCONTROL_ACTION,
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MCONTROL_ACTION_DEBUG_MODE);
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tdata1 = set_field(tdata1, MCONTROL_MATCH, MCONTROL_MATCH_EQUAL);
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tdata1 |= MCONTROL_M;
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if (info->misa & (1 << ('H' - 'A')))
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tdata1 |= MCONTROL_H;
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if (info->misa & (1 << ('S' - 'A')))
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tdata1 |= MCONTROL_S;
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if (info->misa & (1 << ('U' - 'A')))
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tdata1 |= MCONTROL_U;
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if (trigger->execute)
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tdata1 |= MCONTROL_EXECUTE;
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if (trigger->read)
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tdata1 |= MCONTROL_LOAD;
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if (trigger->write)
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tdata1 |= MCONTROL_STORE;
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register_write_direct(target, GDB_REGNO_TDATA1, tdata1);
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register_read_direct(target, &tdata1_rb, GDB_REGNO_TDATA1);
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LOG_DEBUG("tdata1=0x%" PRIx64, tdata1_rb);
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if (tdata1 != tdata1_rb) {
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LOG_DEBUG("Trigger %d doesn't support what we need; After writing 0x%"
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PRIx64 " to tdata1 it contains 0x%" PRIx64,
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i, tdata1, tdata1_rb);
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register_write_direct(target, GDB_REGNO_TDATA1, 0);
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if (hartid > 0) {
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LOG_ERROR("Setting hardware breakpoints requires "
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"homogeneous harts.");
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return ERROR_FAIL;
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}
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break;
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}
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register_write_direct(target, GDB_REGNO_TDATA2, trigger->address);
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}
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register_write_direct(target, GDB_REGNO_TDATA2, trigger->address);
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if (tdata1 != tdata1_rb) {
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continue;
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}
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LOG_DEBUG("Using resource %d for bp %d", i,
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trigger->unique_id);
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@ -870,6 +900,9 @@ static int remove_trigger(struct target *target, struct trigger *trigger)
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{
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riscv013_info_t *info = get_info(target);
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// Assume that all triggers are configured the same on all harts.
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riscv_set_current_hartid(target, 0);
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maybe_read_tselect(target);
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int i;
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@ -884,8 +917,11 @@ static int remove_trigger(struct target *target, struct trigger *trigger)
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return ERROR_FAIL;
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}
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LOG_DEBUG("Stop using resource %d for bp %d", i, trigger->unique_id);
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register_write_direct(target, GDB_REGNO_TSELECT, i);
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register_write_direct(target, GDB_REGNO_TDATA1, 0);
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for (int hartid = 0; hartid < riscv_count_harts(target); ++hartid) {
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riscv_set_current_hartid(target, hartid);
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register_write_direct(target, GDB_REGNO_TSELECT, i);
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register_write_direct(target, GDB_REGNO_TDATA1, 0);
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}
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info->trigger_unique_id[i] = -1;
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return ERROR_OK;
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