Commit Graph

3538 Commits

Author SHA1 Message Date
Antonio Borneo 113ba58231 target: rewrite command 'target curstate' as COMMAND_HANDLER
While there, add the mandatory 'usage' field.

Change-Id: Ibfda6f56a1450e2eb9ad3092d756de0778f4a092
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7504
Tested-by: jenkins
2023-03-25 18:14:52 +00:00
Antonio Borneo 584986ab1c target: rewrite command 'read_memory' as COMMAND_HANDLER
While there, fix typo on 'exceeds'.
In a following patch, the output could be formatted and split in N
values per line to make it easier to read by humans.

Change-Id: I295111a80934393011e46311f6cf6c13f2bdc0a3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7503
Tested-by: jenkins
2023-03-25 18:14:40 +00:00
Antonio Borneo 6f8c27dcfc target: arm_tpiu_swo: rewrite command 'tpiu init' as COMMAND_HANDLER
Change-Id: Iaaccfc62dd85267066a152c434f254d1b9a0c4f1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7502
Tested-by: jenkins
2023-03-25 18:14:30 +00:00
Antonio Borneo 90ddac12e3 target: arm_tpiu_swo: rewrite command 'tpiu names' as COMMAND_HANDLER
While there, format in a human readable way the output list by
using one line per tpiu name.

Change-Id: I937c92b6c1e92509cf8aa96be1517a51bc363600
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7501
Tested-by: jenkins
2023-03-25 18:14:18 +00:00
Antonio Borneo 5d39a8852a target: arm_tpiu_swo: rewrite command 'tpiu enable' as COMMAND_HANDLER
Change-Id: Ia600948b99a229ef0490b7f576df62f880db8546
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7500
Tested-by: jenkins
2023-03-25 18:14:07 +00:00
Antonio Borneo 8fa6db6e8e target: arm_tpiu_swo: rewrite command 'tpiu disable' as COMMAND_HANDLER
Change-Id: I689482f898bde2afa2881b2f311676a6b98abb9a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7499
Tested-by: jenkins
2023-03-25 18:13:56 +00:00
Antonio Borneo f76e67a440 target: arm_dap: rewrite command 'dap names' as COMMAND_HANDLER
While there, format in a human readable way the output list by
using one line per dap name.

Change-Id: I24a47350105b90db15808c61790f05d807120739
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7498
Tested-by: jenkins
2023-03-25 18:13:46 +00:00
Antonio Borneo 5da4ef25c8 target: cti: rewrite command 'cti names' as COMMAND_HANDLER
While there, format in a human readable way the output list by
using one line per cti name.

Change-Id: I6d4870ee512fe7e6935d73355c2377ad805ccc3b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7492
Tested-by: jenkins
2023-03-25 18:12:20 +00:00
Antonio Borneo c4f2337d02 target: armv4_5: rewrite commands 'arm mcr/mrc' as COMMAND_HANDLER
While there, add a check for target halted and check the number of
parameters accordingly to the command name.

Change-Id: I9e8bb109c35039561997d14782fac682267aee65
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7491
Tested-by: jenkins
2023-03-25 18:12:02 +00:00
Antonio Borneo 21e6252965 target: aarch64: rewrite commands 'aarch64 mcr/mrc' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_TARGET_NOT_HALTED from a
jim command.

Change-Id: I99a02a21bedb64e60944e295c7cf24356e07be60
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7490
Tested-by: jenkins
2023-03-25 18:11:26 +00:00
Tomas Vanek 415715d91a target/adi_v5_jtag: fix endianness error in transaction replay
The code for JTAG WAIT recovery did not handle DP_SELECT
endianness.

While on it, mark missing ADIv6 DP SELECT1 handling as TODO.

Change-Id: I44f3bc8fc9fd2483c0293b6d4f2c51a60ca01873
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7540
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-03-25 18:07:51 +00:00
Tomas Vanek 6ecd99ff9b target/adi_v5_swd: update comment about SWD capability
The multidrop SWD is also supported.

Change-Id: I9fefc54fc9d40a75194285cd6e0f10c5c347d9b6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7537
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-03-25 18:07:04 +00:00
Erhan Kurubas faeae51d7f target/espressif: check common_magic instead of gdb_arch string
The value returned by target_get_gdb_arch() is something specific for GDB.
There could be several variants of the same CPU.
If we start implementing all the variants, checking the string value,
could become incorrect.
It's better to check for xtensa->common_magic == XTENSA_COMMON_MAGIC

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I20f3fdced176c3b9ab00f889743161ecad7280f9
Reviewed-on: https://review.openocd.org/c/openocd/+/7536
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-03-25 18:06:36 +00:00
Ian Thompson 904d58c208 target/xtensa: add NX support
- Manual integration of NX support from xt0.2 release
- No new clang static analysis warnings

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I95b51ccc83e56c0d4dbf09e01969ed6a4a93d497
Reviewed-on: https://review.openocd.org/c/openocd/+/7356
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-03-18 21:56:50 +00:00
Peter Collingbourne 047b1a8fc2 target/image: zero-initialize ELF segments up to p_memsz
We were previously not zero-initializing ELF segments between p_filesz
and p_memsz (aka BSS). However, this may be necessary depending on the
user's application. Therefore, start doing so.

Change-Id: I5a743390069583aca7ee276f53afeccf2cac0855
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7513
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-03-18 21:52:02 +00:00
Antonio Borneo 4a79372b6e target: arc: rewrite command 'arc add-reg' as COMMAND_HANDLER
While there, fix some coding style error and remove the now unused
function jim_arc_read_reg_name_field() and the macro
JIM_CHECK_RETVAL().

Change-Id: I140b4b929978b2936f2310e0b7d1735ba726c517
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7426
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:48:48 +00:00
Antonio Borneo 85f3b10a69 target: arc: rewrite command 'arc add-reg-type-struct' as COMMAND_HANDLER
Use a COMMAND_HELPER() to avoid memory leaks when the helper
COMMAND_PARSE_NUMBER() returns due to an error.

While there:
- fix potential SIGSEGV due to dereference 'type' before checking
  it's not NULL;
- fix an incorrect NUL byte termination while copying to
  type->data_type.id and to bitfields[cur_field].name;
- fix some coding style error;
- remove the now unused function jim_arc_read_reg_type_field().

Change-Id: I7158fd93b5d4742f11654b8ae4a7abd409ad06e2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7425
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:48:26 +00:00
Antonio Borneo 92ef27494c target: arc: rewrite command 'arc add-reg-type-flags' as COMMAND_HANDLER
Use a COMMAND_HELPER() to avoid memory leaks when the helper
COMMAND_PARSE_NUMBER() returns due to an error.

While there:
- fix potential SIGSEGV due to dereference 'type' before checking
  it's not NULL;
- fix an incorrect NUL byte termination while copying to
  type->data_type.id and to bitfields[cur_field].name;
- fix some coding style error.

Change-Id: Ide4cbc829871a6a523026ccc0d3100dadc2afd06
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7424
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:48:15 +00:00
Antonio Borneo 18bafdce61 target: arc: fix error handling in command 'arc set-reg-exists'
The command is specified through COMMAND_HANDLER. It should not
return JIM_OK / JIM_ERR.

Change-Id: I56666414d49b0298ecc23ec7ef30c77e1e27afa8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7413
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:47:30 +00:00
Antonio Borneo da76ba610b target: arc: rewrite command 'arc num-actionpoints' as COMMAND_HANDLER
Also drop arc_cmd_jim_get_uint32() that is now unused.

Change-Id: Ic26c3f008376db3f01215bf736fca736dd1c1a4f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7412
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:47:17 +00:00
Antonio Borneo 996d6f383d target: arc: rewrite command 'arc get-reg-field' as COMMAND_HANDLER
This also fixes several incorrect return ERROR_xxx from a jim
command.

Change-Id: I34fe3552d3dc344eac67bf504c5d5709b707fdfd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7411
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:47:01 +00:00
Antonio Borneo f0cb5b0272 target: arc: rewrite command 'arc jtag set-core-reg' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_OK from a jim command.

Change-Id: I72a522645f62b99b313573c8bad6d4f674c5ae53
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7410
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:46:46 +00:00
Antonio Borneo 16af56f600 target: arc: rewrite command 'arc jtag get-core-reg' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_OK from a jim command.

Change-Id: I1f9cf5d1dfa38b8a06042b5f54209e6ee2fc4e0e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7409
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:46:31 +00:00
Antonio Borneo 551d85b123 target: arc: rewrite command 'arc jtag set-aux-reg' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_OK from a jim command.

Change-Id: Iab9bc7c25181341a632f608a8ef2d8b0bea72520
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7408
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:46:19 +00:00
Antonio Borneo 700cdbfac4 target: arc: rewrite command 'arc jtag get-aux-reg' as COMMAND_HANDLER
This also fixes an incorrect return ERROR_OK from a jim command.

Change-Id: I3c51355e7e05965327ce819a3114e370f2de5249
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7407
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
2023-02-03 22:45:56 +00:00
Marian Buschsieweke 6e67f1473a helper: Add generic little endian CRC32 function
This generalizes the little endian CRC32 function used in the OR1K
target and moves it to a common helper, so that other places do not need
to reinvent the wheel. It is directly used in the OR1K target.

Change-Id: I0e55340281a5bfd80669bb1994f3a96fecc1248a
Signed-off-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7415
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-21 22:57:33 +00:00
Boris-Chengbiao Zhou 11ee500bff target/armv7m: Rename xPSR to xpsr
The org.gnu.gdb.arm.m-system GDB feature defines the name in lowercase
letters.[1] Not adhering to the definition can cause issues with tools
interacting with the GDB which expect the correct casing.

[1]: https://sourceware.org/gdb/onlinedocs/gdb/ARM-Features.html

Change-Id: I0b6584a78f86b053947d79686baad5dac3ec4a00
Signed-off-by: Boris-Chengbiao Zhou <bobo1239@web.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7292
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 15:01:03 +00:00
Antonio Borneo f2fc23e16b riscv: drop deprecated command 'riscv test_sba_config_reg'
Change-Id: I51c1b1cb3de8cb86ee38280fa3f035f6f7a63dbc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7272
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Tested-by: jenkins
2023-01-15 14:56:59 +00:00
Antonio Borneo 27edeb7757 riscv: drop deprecated command 'riscv set_prefer_sba'
Change-Id: I546efe4e1a6b673b26cfb4a74b5c3809fecda49c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7271
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
2023-01-15 14:56:50 +00:00
Tomas Vanek 59763653c6 target/cortex_m: add SMP support for Cortex-M
Cortex-M support for SMP multicore targets.

This SMP implementation unlike older ones does not act
on the first halted target found. It polls targets
until a SMP group is finished and stores eventual
'halted' events instead of emitting them. As soon as polling
of a group is done, poll proceeds with SMP related tasks.
This approach improves detection of a reason why debug
stopped - a correct reason is detected for all targets,
not only for the first found.
Drawback: SMP target group should be defined in the same
order as the targets were defined.

Obsolete gdb 'J' packet/smp_gdb command core switching is not implemented,
use with rtos hwthread.

Only one core is resumed if debug_execution is requested.

Some ideas taken from Graham Sanderson's [4936]
and src/target/aarch64.c

Added error checking of armv7m_restore_context().

Change-Id: I60f5b79e74b624dc2b5835ff10e38ac2ccb23792
Link: [4936]: target/cortex_m: Add smp support for Cortex M | https://review.openocd.org/c/openocd/+/4936
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7239
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 14:54:50 +00:00
Tomas Vanek 083100fca3 target/armv7m: check error in armv7m_restore_context()
Return error if arm.write_core_reg() fails.

Change-Id: Ide8f5aa5958532b202dc9f5e13d3250a706d832d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7238
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 14:54:27 +00:00
Koudai Iwahori d0436b0cda armv8: Add support of pointer authentication
When pointer authentication is enabled, some upper bits of the link
register (LR[63:VA_SIZE]) are used to store a signature. Therefore, GDB
need to remove the signature to get backtraces.
GDB has support of pointer authentication. When pointer authenticaion is
enabled, GDB requests 8-bytes mask to the target to remove the
signature. mask[63:VA_SIZE] should be all set and mask[VA_SIZE-1:0]
should be all cleared. GDB removes the signature by addr&~mask or
addr|mask.
I added a feature to provide the mask for pointer authentication.

Signed-off-by: Koudai Iwahori <koudai@google.com>
Change-Id: I56fbbf9cc23619b6536ecd326f350c8bf137f322
Reviewed-on: https://review.openocd.org/c/openocd/+/7248
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 14:51:44 +00:00
Erhan Kurubas 0708ccead4 target/xtensa: remove needless target_was_examined check
In any case flag will be set as examined.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I5177ee656f726a807269e2f4725223f50e49e855
Reviewed-on: https://review.openocd.org/c/openocd/+/7231
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-15 14:47:59 +00:00
Antonio Borneo da34e36cdb nds32: drop it, together with aice adapter driver
The target nds32 and its companion adapter aice have not received
any real improvement since 2013.
It has been hard to keep them aligned during the evolution of
OpenOCD code, with no way for maintainers to really check if they
are still working.
No real documentation is present for them in OpenOCD.
The nds32 code triggers ~50 errors/warnings with scan-build.

The arch nds32 has been dropped from Linux kernel v5.18-rc1.

For all the reasons above, this code has been deprecated with
commit 2e5df83de7 ("nds32: deprecate it, together with aice
adapter driver") and tagged to be dropped before v0.13.0.

Let it r.i.p. in OpenOCD git history.

While there, drop from checkpatch list the camelcase symbols that
where only used in this code.

Change-Id: Ide52a217f2228e9da2f1cc5036c48f3536f26952
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7382
Tested-by: jenkins
2023-01-15 14:46:36 +00:00
Marcin Niestroj 7dd5b6a464 rtt: fix corner-cases of finding control block
This patch fixes two corner-cases of finding RTT control block.

The first one is when there was a partial match (even single byte) at
the end of loaded buffer (uint8_t buf[1024]), but this was not part of
full match. In that case `cb_offset` was not updated correctly and the
returned `*address` was lower by the legth of the partial match. In case
of searched 'SEGGER RTT' (the default control block ID) string, it was
enough to match `buf[1023] == 'S'`, which is quite likely to happen, and
the `*address` was offset by 1 (e.g. it was 0x20000fff instead of
0x20010000).

Updating (or even maintaining) `cb_offset` is not needed, as start
address of control block can be calculated based on memory address that
was loaded into `uint8_t buf[1024]`, the offset within this buffer and
the length of expected string.

The second issue is when control block is prepended with a byte that
matches first ID character, e.g. there is `SEGGER RTT` control block ID
is prepended by another `S`, making memory contents be `SSEGGER RTT`. In
that case there was no match found.

Fix that issue by making sure that tested byte is always compared with
first byte of expected control block ID.

While at it, change names of local variables to better describe their
meaning.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Change-Id: I12aa6e202bf12bedcbb888ab595751a2a2518a24
Reviewed-on: https://review.openocd.org/c/openocd/+/7429
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-11 17:02:25 +00:00
Antonio Borneo 77c281d2df cortex_m: handle armv8m cores without security extension
Cores armv8m, e.g. Cortex-M33, can be instantiated without the
optional Security Extension.
In this case, the secure registers are not present and when GDB
try accessing them it triggers a set of errors.

For armv8m cores without security extension, don't provide to GDB
the description of the secure registers.

Change-Id: I254478a4cf883e85b786df3f62c726b2f40d88d9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-18 21:52:41 +00:00
Antonio Borneo 2b6fe8f1ab target: fix assert in 'monitor profile' on constant PC
When target is stopped in WFI/WFE or is in an infinite loop, the
sampled PC will always return the same value.
Command 'profile' requires that distance between min and max PC
should be at least 2, which is not the case for constant PC, and
incorrectly enforces the check through as assert().

Move the code that reads the optional parameters 'start' and 'end'
and check the gap 'end - start' before running the profile.
For self-computed min and max, increase max (or decrease min) to
match the required constraint.
Drop the assert().

Change-Id: I2be8df8568ce8c889923888c492e4f7ce354b16b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/370/
Reviewed-on: https://review.openocd.org/c/openocd/+/7400
Tested-by: jenkins
2022-12-17 09:32:34 +00:00
Antonio Borneo a51ac964c6 target: fix unsigned computation in 'monitor profile'
The implementation of command 'monitor profile' has few
issues:
- the address_space is a signed int, so cannot wrap-around on
  space over INT_MAX;
- max address is incremented without check for overflow;
- assert() used on errors instead of returning error codes;
- only handles 32 bits PC;
- output file created and left empty on error.

This patch fixes the first two issues, as a wider fix would be too
invasive and should be postponed in a following series.

Change-Id: Id8ead3f6db0fd5730682a0d1638f11836d06a632
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/370/
Reviewed-on: https://review.openocd.org/c/openocd/+/7394
Tested-by: jenkins
2022-12-17 09:32:09 +00:00
Antonio Borneo a6b0221952 target: cortex_a: fix clang error core.CallAndMessage
Clang complains about the variable 'orig_dfsr' that can be used
uninitialized both in cortex_a_read_cpu_memory() and in
cortex_a_write_cpu_memory().

The issue is caused by an incorrect error path that used to jump
through 'goto out'. The code after the label 'out' is specific to
handle the case of an error during memory R/W; it is incorrect to
jump there to handle an error during the initialization that
precedes the memory R/W.

Replace the 'goto out' with 'return retval'.
Remove the label 'out' that is now unused.

Change-Id: Ib4b140221d1c1b63419de109579bde8b63fc2e8c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7393
Tested-by: jenkins
2022-12-17 09:31:29 +00:00
Antonio Borneo c6fe10de75 arm_adi_v5: fix SIGSEGV due to failing re-examine
Commit 35a503b08d ("arm_adi_v5: add ap refcount and add get/put
around ap use") modifies the examine functions of mem_ap, cortex_m,
cortex_a and aarch64 by calling dap_put_ap() and then looking again
for the mem-ap and calling dap_get_ap().
This causes an issue if the system is irresponsive and the examine
fails and left the AP pointer to NULL. If the system was already
examined the NULL pointer will cause a SIGSEGV.

Commit b6dad912b8 ("target/cortex_m: prevent segmentation fault
in cortex_m_poll()") proposes a fix for one specific case and only
on cortex_m.

Modify all the examine functions by skipping look-up for the AP if
it was already set in a previous examine; the target's AP is not
supposed to change during runtime.

Remove the partial fix for cortex_m as it is not needed anymore.

Change-Id: I806ec3b1b02fcc76e141c8dd3a65044febbf0a8c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 35a503b08d ("arm_adi_v5: add ap refcount and add get/put around ap use")
Reviewed-on: https://review.openocd.org/c/openocd/+/7392
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-17 09:30:45 +00:00
Nima Palizban 2278878a05 src/target/mips_m4k.c: set missing flag in set_watchpoint
Without the fix, will see "Can not find free FP Comparator" error log

Change-Id: Id0d91cc02b7055e44d27507f9c05ccd48ff49838
Signed-off-by: Nima Palizban <n.palizban@gmail.com>
Fixes: fb43f1ff4e (target: Rework 'set' variable of break-/watchpoints)
Reviewed-on: https://review.openocd.org/c/openocd/+/7389
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-17 09:29:32 +00:00
Evgeniy Naydanov 04887d3b68 Fix jim_target_smp for smp rtos target
If multiple targets are specified as -rtos <rtos_type>, the
rtos_update_threads was called only if the last target was specified as
rtos, which is inconsistent with other checks of whether or not smp target
is an rtos one.

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: Ie52bc6b6c8f841d31b9590fcbc44e985d3cba0eb
Reviewed-on: https://review.openocd.org/c/openocd/+/7244
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:27:00 +00:00
Tomas Vanek 9d925776b4 target/armv7m: fix feature name of ARMv8M security extension regs
gdb requires this feature to enable stack unwinding of secure/nonsecure
interstate calls and exceptions on an ARMv8M target with
the security extension.

Tested on STM32L5 (Cortex-M33).

Change-Id: Ib09780c011afbc095b352074068597559ad14fcd
Link: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ae7e2f45aa4798be449f282bbf75ad41e73f055e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7265
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-15 21:39:19 +00:00
Tomas Vanek 6939187853 target/armv7m: prevent saving and restoring non existent regs
armv7m_start_algorithm() saves register values to arch_info->context.
armv7m_wait_algorithm() restores register values from arch_info->context.
Exclude registers with flag exist = false from both loops.

While on it refactor the register restore: introduce 'struct reg' pointer
and dereference it instead of numerous accesses by a full path
from armv7m pointer.

Change-Id: I1600084db84809ee13bcf8e7828b79f8c9ff9077
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7276
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-15 21:30:07 +00:00
Antonio Borneo 5fc4882b80 dsp5680xx: fix clang error core.UndefinedBinaryOperatorResult
Clang get confused by initializing the array uint16_t lock_word[],
casting it to (uint8_t *), then accessing the second element of
the uint8_t pointer.

  src/target/dsp5680xx.c:2046:41: warning: The left operand of '<<'
    is a garbage value [core.UndefinedBinaryOperatorResult]
        uint16_t tmp = (buffer[0] | (buffer[1] << 8));
                                     ~~~~~~~~~ ^
Fix it by replacing the array with a single uint16_t.

The code is still depending on host endianness; no fix for this is
proposed.

Change-Id: I16dfd60cab117dd145aeecf10d9593574ff233a2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7302
Tested-by: jenkins
2022-11-11 20:11:22 +00:00
Antonio Borneo 0946e80407 esirisc_jtag: fix clang error core.VLASize
The function esirisc_jtag_recv() can be called with argument
num_in_fields = 0, for example as consequence of calling
esirisc_jtag_continue().
In this case, num_in_bytes is zero and the allocation of the
variable-length array 'r' requires size zero.

  src/target/esirisc_jtag.c:133:2: warning: Declared variable-length
    array (VLA) has zero size [core.VLASize]
        uint8_t r[num_in_bytes * 2];
        ^~~~~~~~~ ~~~~~~~~~~~~~~~~

Fix it by forcing size one when num_in_bytes is zero.

Change-Id: Id764c7b5ec4f5b3c18c7da650bbff39fc98ed049
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7301
Tested-by: jenkins
2022-11-11 20:11:03 +00:00
Antonio Borneo 7a09635735 openrisc: fix clang error core.CallAndMessage
Clang assumes that size could assume a value that is not 1 nor 2
nor 4. In such condition the buffer in t is allocated (size != 1)
and not initialized. This triggers an error:
  src/target/openrisc/or1k_du_adv.c:655:14: warning: 2nd function
    call argument is an uninitialized value [core.CallAndMessage]
                crc_calc = adbg_compute_crc(crc_calc, data[i], 8);
                           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Add the default case to cover other values of size.

After this fix, clang still complains on the same line, this time
misunderstanding the limits of the loop and considering that
buf_bswap16() only swaps the first 16 bits, thus passing not
initialized value data[2] to adbg_compute_crc()

Replace malloc() with calloc() to silent it.

Change-Id: I358d7fb2ebefd69255670641bd435b770762a301
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7300
Tested-by: jenkins
2022-11-11 20:10:41 +00:00
Erhan Kurubas 535de48ca6 target/xtensa: remove redundant call for `TARGET_EVENT_HALTED`
`xtensa_do_step` is invoked from `xtensa_prepare_resume` to silently
step over BP/WP before resuming.
For example; in the case of WPs (DEBUGCAUSE_DB), in the current
implementation `xtensa_do_step` will generate one more
`TARGET_EVENT_HALTED` after the original one caused by WP itself.

This patch moves the halted event cb call after
the step is done successfully.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I9048e14fb316dc124847a42cfaefb1f76b5ce53e
Reviewed-on: https://review.openocd.org/c/openocd/+/7274
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-21 18:16:23 +00:00
Antonio Borneo b8735bbf7e doc: fix riscv commands
- Fix the declaration of riscv command 'set_mem_access'.
- Remove non existing riscv command 'set_scratch_ram'.
- Add riscv commands 'info', 'reset_delays'; copy the description
  from the 'help' text.
- Don't add riscv commands 'set_prefer_sba' and 'test_sba_config_reg'
  as they are marked as deprecated.
- Ensure that 'test_sba_config_reg' prints a deprecation warning
  when used.

Change-Id: I39dc3aec4e7f13b69ac19685f1b593790acdde83
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7268
Reviewed-by: Tim Newsome <tim@sifive.com>
Tested-by: jenkins
2022-10-21 18:14:46 +00:00
Erhan Kurubas 3b8333bd3f target/xtensa: fill register number field in the cache
Currently 'number' field is zero in the register cache and
this causes an issue on `rtos get_thread_reg_list` calls.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Iaef11e01f55d012969bbc1933f82847d5e02fec5
Reviewed-on: https://review.openocd.org/c/openocd/+/7246
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-15 15:58:44 +00:00
Erhan Kurubas 2d5d8a5a62 target/esp32s2: check xtensa_poll return value
Although scan build couldn't catch, return value overwritten
without checking.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I02b10002b03640604315047e8a8a639824724c16
Reviewed-on: https://review.openocd.org/c/openocd/+/7247
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-15 15:57:57 +00:00
Tomas Vanek dc6cad855d target: re-examine before arp_waitstate in ocd_process_reset_inner
arp_waitstate will not work on not-examined state

Change-Id: I56c3e1c7e63af108e4ed1dbacebb567f9bf46264
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7230
Tested-by: jenkins
Reviewed-by: Erwan Gouriou
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 08:53:51 +00:00
Tomas Vanek 1f84f34850 target/hla_target: try to re-examine under reset in hl_assert_reset()
An application often idling in real sleep mode may make a Cortex-M target
hard to access as CPU clock are gated and debug requests are responded
by WAIT ack.

Try to examine the target under reset as the last resort.

Change-Id: I7c3de39fb1e6c23b76e2a0a85ab75f23aac94c4d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7229
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 08:52:45 +00:00
Tomas Vanek f65d1da013 target/cortex_m: try to re-examine under reset in cortex_m_assert_reset()
An application often idling in real sleep mode may make a Cortex-M target
hard to access as CPU clock are gated and debug requests are responded
by WAIT ack.

Try to examine the target under reset as the last resort.

Change-Id: Ife875a966a838c37dde987bc584ad0a1f4d020d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 08:49:52 +00:00
Tomas Vanek b991c416b7 target/cortex_m: make reset robust again
After merging [1] 'reset halt' does not work on not responding Cortex-M.

Relax the examined tests and try to set vector catch VC_CORERESET
if debug_ap is available.

While on it add an info about examination state to debug logs.

Fixes: [1] commit 98d9f1168c ("target: reset target examined flag if target::examine() fails")
Change-Id: Ie2e018610026180af5997d70231061a275f05c76
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6745
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 08:46:12 +00:00
Daniel Goehring a69b382efd target/adiv5: 64-bit TAR setup bugfix
For 64-bit TAR setup, if 'tar_valid == false' perform the upper 32-bit
write even if the cached copy matches the upper TAR value to be written.

Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Change-Id: I320377dc90a9d1d7b64cbb281b2527e56c7621ee
Reviewed-on: https://review.openocd.org/c/openocd/+/7245
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2022-10-08 07:55:35 +00:00
Erhan Kurubas cff2cf373f target/xtensa: pass correct buffer on read memory retry
Read values must be at albuff so that can be copied to buffer
on function exit.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I74a533e8f12f1002ca06a98a7c7cd928552b4cc5
Reviewed-on: https://review.openocd.org/c/openocd/+/7226
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:53:12 +00:00
Erhan Kurubas 10b08d5ac5 target/xtensa: rename pc and ps macro names
Actually they are the base of epc and eps

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I4f43b9609a9929399fb5d3fa0203efc8a98e94c9
Reviewed-on: https://review.openocd.org/c/openocd/+/7227
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:52:49 +00:00
Tomas Vanek 48507e3b10 target/armv7m: show target name in 'halted' message
Change-Id: I13e9a33677632d52122585203252fc4ef0c52a2a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7237
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-10-08 07:47:09 +00:00
Tomas Vanek bced97cce9 target/armv7m: prevent storing invalid register
armv7m_start_algorithm() stored all non-debug execution
registers from register cache without checking validity.

Check if the register cache is valid.
Try to read from CPU if not valid.
Issue a warning if register read fails.

Change-Id: I365f86d65243230cf521b13909575e5986a87a50
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7240
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2022-10-08 07:46:16 +00:00
Tomas Vanek 5f14140953 target/adi_v5_swd: suppress reconnect in swd_multidrop_select()
swd_multidrop_select() uses its own retry loop.
If select fails, do_reconnect flag remains set on exit and causes
useless reconnect.

Clear do_reconnect flag in retry loop.

Change-Id: Ie06d6967d7f4a977774c8530bb8d4b3e5ab4f62c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7217
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
2022-09-27 08:29:00 +00:00
Tomas Vanek b2f6b23117 target/adi_v5_swd: fix SWD multidrop
Implementation of ADI v6 introduced banking of DP reg 0.
The accompanying change preventing DP SELECT write before
DP IDR read during connect was added to swd_connect_single() only.
Unchanged swd_connect_multidrop() / swd_multidrop_select_inner()
was broken as it emited DP SELECT and put DP to protocol error state.

Copy dap->select handling to swd_multidrop_select_inner().

Fixes: 72fb88613f (adiv6: add low level swd transport)

Change-Id: I514cd6d9ae2ba97ce3657b459df22638c278a0b1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7213
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
2022-09-27 08:28:44 +00:00
Daniel Goehring 1293ddd657 target/target: read_memory 64-bit bugfix
Increase "value_buf" size so it can hold a 64-bit number represented
as a string. Previous size could only hold a 32-bit number string.

Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Change-Id: If6fbc875236e6ddc59522fbc25db0129eb60ee27
Reviewed-on: https://review.openocd.org/c/openocd/+/7221
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-23 21:26:44 +00:00
Ian Thompson 53d17e7901 target/xtensa: fix final clang analyzer warning
Reworked xtensa_read_memory() logic to always allocate
and initialize working buffer with sufficient padding.

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: Ia9ab53336537adebf99f8156f481ca8279a7cd5d
Reviewed-on: https://review.openocd.org/c/openocd/+/7211
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
2022-09-23 21:25:34 +00:00
Antonio Borneo 44ed26a1db target/riscv: fix use of uninitialized value
Scan-build reports:
	Logic error: Uninitialized argument value
	riscv.c:2688 2nd function call argument is an uninitialized value

This is a real error cause by running the command "riscv
authdata_write" without arguments. In such case 'value' is not
initialized and is passed to and used by r->authdata_write().

Reorganize the code to:
- detect the correct amount or command's arguments;
- drop the LOG_ERROR() on ERROR_COMMAND_SYNTAX_ERROR;
- drop the 'else' after 'return'.

Change-Id: I62e031220593b8308bc674b753e15d16d4c5c9ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7210
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
2022-09-23 21:25:08 +00:00
Antonio Borneo fd2a44ab55 target/riscv: fix undefined operation
Scan-build reports:
	Logic error: Result of operation is garbage or undefined
	riscv.c:1614 The result of the left shift is undefined due
		to shifting by '4294967281', which is greater or
		equal to the width of type 'target_addr_t'

This is a false warning due to clang that considers the impossible
case of 32 bits hart (xlen = 32) in SATP_MODE_SV48 mode
(info->va_bits = 48).
Under such case:
	riscv.c:1614 ... ((target_addr_t)1 << (xlen - (info->va_bits - 1))) ...
the shift amount wraps around the unsigned type and assumes the
value 4294967281 (0xfffffff1).

Use assert() to prevent clang from complaining.

Change-Id: I08fdd2a806c350d061641e28cf15a51b397db099
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7209
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
2022-09-23 21:24:49 +00:00
Antonio Borneo aff48a6a31 target/riscv: fix dead assignment
Scan-build reports:
	Unused code: Dead nested assignment
	riscv.c:459 Although the value stored to 'ir_user4_raw' is
		used in the enclosing expression, the value is
		never actually read from 'ir_user4_raw'

This is caused by the value reassigned in 'ir_user4_raw':
	riscv.c:459 ir_user4[3] = (uint8_t)(ir_user4_raw >>= 8);
but never used.

Drop the DIY conversion in favor of h_u32_to_le() that does not
reassign the input value.

Change-Id: Ifad29f4c46d4a2d0a2f5a5c4104d768cc3db2794
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7208
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
2022-09-23 21:24:41 +00:00
Antonio Borneo ea9089944e target/riscv: fix unused initialization
Scan-build reports:
	Unused code: Dead assignment
	riscv.c:716 Value stored to 'result' is never read

Remove the initialization of variable 'result'.

Change-Id: Ied67bb4fcfa5bace186522074247ead43a5d5cd5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7207
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
2022-09-23 21:24:34 +00:00
Antonio Borneo aa57890554 target/riscv-013: fix unused initialization
Scan-build reports:
	Unused code: Dead initialization
	riscv-013.c:2362 Value stored to 'control' during its
		initialization is never read

Remove the initialization of variable 'control'.

Change-Id: I548f8175530b9a2aa4c1788549d6467bf9824584
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7206
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
2022-09-23 21:22:42 +00:00
Antonio Borneo 8db6dff333 target/riscv-013: fix unchecked return code
Scan-build complains about variable 'sbcs_orig' that can be used
not initialized.
	Logic error: Assigned value is garbage or undefined
	riscv-013.c:4468 Assigned value is garbage or undefined
This is caused by not checking the return value of the call
	riscv-013.c:4466 dmi_read(target, &sbcs_orig, DM_SBCS);
In fact when dmi_read() returns error, the variable 'sbcs_orig' is
not assigned.

Check the returned value.

Change-Id: Ia9032a0229aa243138f95f4e13f765726a4ceae9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7205
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
2022-09-23 21:22:31 +00:00
Antonio Borneo 8683526af7 target/dsp563xx: fix scan-build warning
Scan-build triggers a warning:
	Unix API: Allocator sizeof operand mismatch
	dsp563xx.c:2143 Result of 'calloc' is converted to a pointer
		of type 'uint8_t', which is incompatible with sizeof
		 operand type 'uint32_t'

It's a false positive because calloc() is properly used in this
case, as the uint8_t array is used in blocks of 4 elements to read
or write uint32_t values.

Either
	calloc(sizeof(uint32_t), count);
and
	malloc(count * sizeof(uint32_t));
keep triggering the same warning.

Drop the warning by using the constant '4' as size of uint32_t, as
already used few lines below.

Change-Id: I5bb1ece177774eefdc5d9cd049338f8f2be87cd7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7203
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2022-09-23 21:22:09 +00:00
Antonio Borneo 382148e4dd openocd: fix SPDX tag format for files .c
With the old checkpatch we cannot use the correct format for the
SPDX tags in the file .c, in fact the C99 comments are not allowed
and we had to use the block comment.

With the new checkpatch, let's switch to the correct SPDX format.

Change created automatically through the command:
	sed -i \
	's,^/\* *\(SPDX-License-Identifier: .*[^ ]\) *\*/$,// \1,' \
	$(find src/ contrib/ -name \*.c)

Change-Id: I6da16506baa7af718947562505dd49606d124171
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7153
Tested-by: jenkins
2022-09-18 08:22:01 +00:00
Ian Thompson 61d0757acf target/xtensa: invalidate register cache on reset
Resolves issues where registers are accessed when poll() logic is inactive or has not yet been triggered.

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: If7a4d00938fb188b008325249627f7773c3484c5
Reviewed-on: https://review.openocd.org/c/openocd/+/7197
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-18 08:12:02 +00:00
Ian Thompson 27e7f5df5f target/xtensa: fix clang analyzer warning
Reworked xtensa_queue_exec_ins_wide() logic to properly handle endian issues while executing arbitrary instructions.

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I5752dd254ce8b8822886ffc7edecaa242a93cce8
Reviewed-on: https://review.openocd.org/c/openocd/+/7198
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-18 08:05:47 +00:00
Ian Thompson 4279b23fca target/xtensa: populate PS correctly during fetch
Read PS from EPS[debuglevel] during fetch such that it reflects the correct value when read via telnet (not just via gdb_server).

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I8504f68989bc6d5fe451a8cb69d01c86f4ec0100
Reviewed-on: https://review.openocd.org/c/openocd/+/7195
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-17 20:57:26 +00:00
Antonio Borneo cec3b62328 mips64: remove empty mips_mips64_soft_reset_halt()
The method soft_reset_halt is optional; no need to add an
empty function.

Remove mips_mips64_soft_reset_halt() and move the TODO comment
in struct target_type.

Change-Id: Id541a75e7a08645568961d59b73a120c2238701f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7184
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-09-13 22:19:13 +00:00
Ian Thompson 58bd387219 target/xtensa: fully initialize buffers for PWRSTAT read
Read buffer is sized for 32-bit APB version of PWRSTAT/PWRCTL registers. Initialize to zero so 8-bit JTAG register mirrors are accurate.

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I81310649fa7180893d0188aab3c8a14315aaea0a
Reviewed-on: https://review.openocd.org/c/openocd/+/7183
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-13 22:18:57 +00:00
Antonio Borneo 5d6be673c3 target: don't export local symbols
Symbols that are not used outside the file should not be exported
and should be declared as static.

Change-Id: Icbe7f7bce287b903edec9dc9db3370722c51fbd5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7173
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-09-13 22:13:58 +00:00
Antonio Borneo 933cbd9156 riscv: don't export local symbols
Symbols that are not used outside the file should not be exported
and should be declared as static.
Move the existing comments to the static declarations.

Change-Id: Idf208e3fda4b3f8df789553cf03ebf5f20d811bb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7170
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Tested-by: jenkins
2022-09-13 22:12:29 +00:00
Antonio Borneo 07d84bca32 target: make local symbols static
Symbols that are not exported should be declared as static.

Change-Id: I2475524f4c14520e3163572560f4a9f276356ed5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7168
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-09-13 22:11:46 +00:00
Antonio Borneo a21489e9b9 xtensa: make local symbols static
Symbols that are not exported should be declared as static.

Change-Id: Ieb627f7f896e4663b0d5b18c4ab1853b39d23d03
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7167
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Ian Thompson <ianst@cadence.com>
Tested-by: jenkins
2022-09-13 22:10:57 +00:00
Antonio Borneo 8310a238dc riscv: make local symbols static
Symbols that are not exported should be declared as static.

Change-Id: Ie3bd17535c8cb2a0fec5d3bedfe7de3e0a702613
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7166
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
2022-09-13 22:10:42 +00:00
Ian Thompson abe5f015c5 target/xtensa: fix step state transition
For some configurations, notably on DAP systems, resolve issue where single-stepping does not always transition into the HALTED state.

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I053f4eaffad8c3228878ba87580ada640e4bd2fe
Reviewed-on: https://review.openocd.org/c/openocd/+/7150
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-13 22:09:02 +00:00
Ian Thompson b2b514be5b target/xtensa: enable DAP/SWD for generic xtensa
- Enable ADIv5 DAP systems via JTAG or SWD transport
- Select correct PWRCTL/PWRSTAT bits for XDM/APB

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I5894210c804f85075da868d0cfc6fb20b589d99f
Reviewed-on: https://review.openocd.org/c/openocd/+/7144
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-13 22:08:14 +00:00
Antonio Borneo 0c6e0bb82b openocd: remove CamelCase symbols *xPSR*
We have left the camelcase symbols *xPSR* for some time, to avoid
any conflict with possibly pending patches in gerrit.
With the approaching v0.12.0-rc1, it's time to revisit it.
The patches in gerrit that conflict with this rename are all not
merge-able due to conflicts or due to negative review.

Drop these CamelCase symbols.

Change-Id: Ifbac4c1df9cc55994e024971a2aaebeed2ea4ed3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7155
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-09-13 22:03:02 +00:00
Antonio Borneo de5c32fe23 openocd: remove recently added CamelCase symbols
Without the help of checkpatch, some CamelCase symbol passed
through the filter of maintainer's review.

Drop them.

Change-Id: If5fb07b2ffb89e853dd2a61f20d4134aa6e20d24
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 48f267d4ad ("flash/stm32l4x: avoid using magic numbers for device ids")
Fixes: 5ab74bde06 ("semihosting: User defined operation, Tcl command exec on host")
Reviewed-on: https://review.openocd.org/c/openocd/+/7154
Tested-by: jenkins
2022-09-13 22:02:33 +00:00
Ian Thompson de99836cf6 target/xtensa: virtualize XDM registers
Use indirect enum IDs to access XDM registers in preparation for supporting both NAR (JTAG) and APB (DAP).  No new clang static analysis warnings.

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I0b742fe4661ff3cf609454b8650493d141a1e1ff
Reviewed-on: https://review.openocd.org/c/openocd/+/7143
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-08 09:32:23 +00:00
Erhan Kurubas bea4d65903 target/espressif: add semihosting support
ARM semihosting + some custom syscalls implemented for
Espressif chips (ESP32, ESP32-S2, ESP32-S3)

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ic8174cf1cd344fa16d619b7b8405c9650e869443
Reviewed-on: https://review.openocd.org/c/openocd/+/7074
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-03 21:27:17 +00:00
iysheng 7dc4be3157 target/arm: Add support with identify STAR-MC1
Tested with an PLUS-F5270 board which uses the MM32F5277E9PV.

Signed-off-by: iysheng <iyysheng@gmail.com>
Change-Id: Icb75ae8337fdc6fa60e39d3d74dd8bc163707bdd
Reviewed-on: https://review.openocd.org/c/openocd/+/7136
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-03 21:26:20 +00:00
Tim Newsome a527112dae target/riscv: Update with latest encoding from riscv-opcodes
This gets us a clearly labeled BSD-3-Clause header, which should be
compatible with OpenOCD and Fedora, and also make it clear what the
license actually is.

See https://github.com/riscv/riscv-openocd/pull/710,
https://github.com/riscv/riscv-openocd/pull/713, and
https://github.com/riscv/riscv-openocd/pull/717.

Change-Id: I992b4f3bb230edb9f281e2278dd41c712098ed4c
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7084
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-27 16:21:15 +00:00
Ian Thompson d93ac5482a target/xtensa: fix clang analyzer warnings
Scan-build of target/xtensa/ has no clang analyzer warnings from xtensa source files.

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I11a125c923ece9a6fd0d9ee1698f742f88ee5cab
Reviewed-on: https://review.openocd.org/c/openocd/+/7141
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-27 16:20:44 +00:00
Erhan Kurubas f77c919cf4 target/xtensa: fix clang analyzer warnings and gcc12 build errors
Fix Unused code	Dead assignment at line 657
Fix Memory error Double free at line 2851
Fix Memory error Memory leak at line 2530
Fix error: 'a3' may be used uninitialized at line 758
Fix error: '%04x' directive writing between 4 and 8 bytes
into a region of size 5 at line 2471

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I0382a622bc7c4108a335fd741816577e79240397
Reviewed-on: https://review.openocd.org/c/openocd/+/7137
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-21 22:04:07 +00:00
Ian Thompson ce5ca9f7ba target: add generic Xtensa LX support
Generic Xtensa LX support extends the original Espressif/Xtensa
patch-set to support arbitrary Xtensa configurations, as defined in
a core-specific .cfg file.  Not yet fully-featured.  Additional
functionality to be added:
- Xtensa NX support
- DAP/SWD support
- File-IO support
- Generic Xtensa multi-core support

Valgrind-clean, no new Clang analyzer warnings

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I08e7bf8fa57c25b5d0cb75a1aa7a2ac13a380c52
Reviewed-on: https://review.openocd.org/c/openocd/+/7055
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-20 15:38:41 +00:00
Erhan Kurubas c271958850 target/semihosting: drop type casting from semihosting->result
Also used type helper (PRId64) to specify format of int64_t

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I594863eab594aff621c26fefcc69a1872e9730ee
Reviewed-on: https://review.openocd.org/c/openocd/+/7111
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-20 15:27:46 +00:00
Erhan Kurubas 9cd714cd14 target/espressif: remove author lines from esp32xx and xtensa files
Some files have author info some doesn't. For the consistency we removed all.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ie6f1ec012302e3a954c75c5106f12820722cb715
Reviewed-on: https://review.openocd.org/c/openocd/+/7104
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-15 13:27:10 +00:00
Tomas Vanek 3adbec9aab target/cortex_m: supress historical reset detection
The S_RESET_ST sticky bit is reset after DHCSR read.
It is set at power-on reset and keeps active until the debuger reads DHCSR.

Ignore S_RESET_ST at the very first read after OpenOCD start
and suppress possibly misleading message "external reset detected"
if we cannot guarantee the reset happened recently.

While on it add a TODO comment.

Change-Id: I15217c2ca6f69ac97aff8be86bce67cba94a42cd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7109
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-15 13:23:57 +00:00
Ian Thompson 48db36f436 gdb_server: custom target-specific GDB queries
Provide a customizable hook for handling target-specific GDB queries

Valgrind-clean, no new Clang analyzer warnings

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I684a259ed29f3651cbce668101cff421e522f79e
Reviewed-on: https://review.openocd.org/c/openocd/+/7082
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-15 13:23:05 +00:00
Antonio Borneo 0d56f379b5 target: add API to temporarily mask target polling
The same flag 'jtag_poll' is currently used as local data for the
command 'poll' and to temporarily mask the target polling.
This can cause unexpected behavior if the command 'poll' is
executed while polling is temporarily masked.

Add a new flag 'jtag_poll_en' to hold the temporarily mask
condition and keep 'jtag_poll' for the 'poll' command only.

While there, change the initial assignment of 'jtag_poll' using
the proper boolean value.

Change-Id: I18dcf7c65b07aefadf046caaa2fcd2d74fa6fbae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7009
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2022-08-15 13:22:06 +00:00
Tim Newsome 81aa5fd6b4 target/riscv: Update debug_defines.h.
This one doesn't have the license in there, which means now it's
acceptable to GPLv2 again.

See https://github.com/riscv/riscv-openocd/pull/711

Change-Id: I8ba27801172ffa955470d2627fa656cad282ee99
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7087
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-15 13:18:16 +00:00
Tomas Vanek 0e1fe03f4b target/arm: do not expose 'arm reg', 'arm mcr/mrc' commands on Cortex-M
Tcl commands 'arm reg', 'arm mcr/mrc' do not work on M-profile based devices.
Isolate them from 'arm core_state' and 'arm disassemble' and do not chain
them from armv7m_command_handlers.

Change-Id: I2c6befdf82575e95cf05ed158ab5e6faa1a182c3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7101
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2022-08-14 14:43:48 +00:00