Known big flash parts such as LPC11u68/e68 have a non-uniform memory
organisation, the first 24 sectors are 4k, the rest are 32k.
Change-Id: Icf515152dfc54ec0ca187561d2d63088b9640f14
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3802
Tested-by: jenkins
Reviewed-by: akaWolf
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
struct flash_driver has a default_padded_value field that is similar,
but it can be changed by the user for the specific purpose of padding.
Add a new erased_value field and initialize it for all targets,
particularly stm32lx, xmc4xxx and virtual.
Use this value in core.c:default_flash_mem_blank_check(), the slow path.
Extend the target API to pass erased_value down to target code.
Adding an argument ensures that we catch all callers.
This allows us to merge xmc4xxx.c:xmc4xxx_blank_check_memory() into
armv7m:armv7m_blank_check_memory().
It further allows us to use default_flash_blank_check() in place of
xmc4xxx.c:xmc4xxx_flash_blank_check(), adding a potential slow path
fallback, as well as stm32lx:stm32lx_erase_check(), adding the potential
armv7m fast path with fallback to default_flash_mem_blank_check().
Fix a mips32 code comment while at it (zeroed -> erased).
The armv4_5 and mips32 target implementations will now error out if an
erase value other than 0xff is used, causing default_flash_blank_check()
to fall back to the default_flank_mem_blank_check() slow path.
Change-Id: I39323fbbc4b71c256cd567e439896d0245d4745f
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3497
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Commit 6d5b4d709c causes failed assert
when JTAG transport is selected:
src/target/arm_adi_v5.h:346: dap_queue_ap_read:
Assertion `ap->dap->ops != ((void *)0)' failed.
As check_security runs early in examine-start event, dap->ops must
be checked.
Change-Id: Ibd8312a3c668fbce834eed9790eabeed794117aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3712
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Large flash parts time out when unlocking. Mass erase time is specified
as 32 seconds worst case for some parts. Automatic mass erase is
probably not using x8 parallelism, though, but a too large timeout
shouldn't hurt.
Also, use the new define instead of hardcoded timeout when mass
erasing.
Change-Id: Ib5af60d52ed7d53277bfe7176c4c44f79d3a26bc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3738
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code memory size was a bug and seemed to be working by
accident since there happened to be 256 pages in the device that was
tested on which corresponded to 256kb.
Also don't fail if memory size != expected memory size based on hwid
as this hwid is unstable and should be used only for debug/diagnostics.
Change-Id: I4e98f7498a36c53fc51783eddfdaba704d30e3ca
Signed-off-by: Michael Dietz <mjdietzx@gmail.com>
Reviewed-on: http://openocd.zylin.com/3510
Tested-by: jenkins
Reviewed-by: Jiří Pinkava <j-pi@seznam.cz>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Added new chip id based flash size.
Change-Id: I5b5e71074af0e50352443f66f88adfc6e14280bf
Signed-off-by: Peter Kuhar <peter@pkuhar.com>
Reviewed-on: http://openocd.zylin.com/3732
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Kinetis family employs strange concept of Flash Configuration Field at
address 0x400 of program flash. Writing incorrect data to FCF may
permanently lock the device.
The change introduces 'kinetis fcf_source protection' mode. In this mode
write of flash image data to FCF is prevented. FCF data build from
protection (set by 'flash protect' command) are written instead.
FCF data are written also just after erase of relevant sector. It
protects device from locking security by reset or power cycle after erase.
prot_blocks array is used as protection blocks have bigger size than sectors.
Alignment and padding programming sections is rewritten to fix
writing with not section boundary aligned begin.
Change-Id: I9fc8bd37d6f627fb8ed7abb7f7560e78a740b195
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3562
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Add kinetis_ftfx_decode_error() to show flash error type in human
readable message.
Add kinetis_ftfx_prepare() to prepare flash module just once in
command (not each time kinetis_ftfx_command() is called).
Change target_read/write_memory() to target_read/write_u8/32().
Make ftfx_fstat parameter of kinetis_ftfx_command() optional.
Longword flash write:
Fix huge memory leak after write of unaligned block.
Check flash address alignment properly.
Do not fill whole padding buffer but its end after original data.
Remove duplicite padding.
Change-Id: Ia5e312909f68d3cc724c8cbffe1cd903b9102124
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3561
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Originally flash/nor infrastructure assumed protection blocks identical
to erase sectors. This assumption is not valid for many flash types.
Driver code fixed the problem either by increasing sector size to
size of protection block or by defining more protection block than
really existed in device. Both cases had drawbacks.
The change retains compatibility with the old driver.
Updated driver can set protection blocks table independent
of sector table.
Change-Id: I27f6d267528ad9ed9fe0a85f05436a8ec17603a4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3545
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The change prevents starting mass_erase in unstable state of MCU
(RESET/WDOG loop).
mass_erase of secured MCU using manual reset button is supported.
Timeouts are measured by timeval_ms() instead of iteration count.
mass_erase timeout prolonged to 16 seconds because aborting
mass_erase in progress (deasserting reset) leaves the device
in security locked state.
Change-Id: I6605532df56080a54c2a1dfe49094e3db4ce534a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3551
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Kinetis driver checks MDM STAT register to detect secured state of MCU.
Original version often reported a blank device as secured one.
Change #3010 has not fixed all false reports.
After changes in arm_adi_v5 infrastructure secured devices was not detected
at all.
New algorithm uses multiple MDM STAT reads and counts MDM_STAT_SYSSEC and
MDM_STAT_FREADY bits. Both secured MCU and MCU locked-up in RESET/WDOG loop
are detected reliably.
Detection is run in both kx.cfg and klx.cfg from examine-start event,
not examine-end as before. Event is configured only for non hla adapter.
Minor fix in klx.cfg: commented out adapter_khz 24000 in reset-init.
Such frequency is not supported in VLPR CPU mode and with JTAG.
Change-Id: I2ec2b68c45bde9898159cd15fbdcbcfa538c41d9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3547
Tested-by: jenkins
Reviewed-by: Steven Stallion <stallion@squareup.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
NXP (nee Freescale) documents the mass erase procedure using the MDM-AP
block in AN4835. Existing support for this feature did not properly
handle boards without SRST. This patch updates the mass_erase command
such that it works correctly on these boards. Additionally, the core is
left in a halted state once complete to prevent reset loops due to the
watchdog as reported by some users.
Since the MDM-AP provides an additional method of halting and resetting
the core that is disconnected from the DAP, additional commands are
provided to manage this state. These commands are particularly helpful
when connecting to a target with an unknown state.
Change-Id: I40f006d5d964befb12b019c5d509988decdd3f91
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/3540
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
at91sam7_read_part_info() walks throw all flash banks following
current one.
I don't know why it has to do it at all (possibly for multi-bank
devices like SAM7S512), but if there is more than one target in JTAG
chain, this lookup can touch flash bank of another (possibly not
halted) target, which cause probe error and current command
execution abort.
[andreas.fritiofson@gmail.com]: Change to for-loop and reduce
indentation
Change-Id: Ide50e93578786e1250f7a0fd0e3d296247924814
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2610
Tested-by: jenkins
- added ids for various parts
- rewrite of sector allocation to deal with dual-bank F76x/77x
- single- / dual-bank mode for F76x/77x
- sector protection adapted for F76x/77x in dual-bank mode
- handling of additional option bits (28-31) in FLASH_OPTCR
in options_read and options_write for F42x/43x/469/479/7xx,
options bits 0-1 masked out
- check for sensible value of user_options in options_write
- some #defines clarified, non-needed ones removed
- docs updated (options read, options write)
Change-Id: Ie4db80e60baa7d2663e024ab1f278640b1ce901b
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/3526
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Only report non-erased or unknown sectors or if bank is fully erased.
Change-Id: I94f0bc2a0d6529d1ea5f66b284cefd6a2c61fe39
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3501
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Corrected 2 Silicon IDs that were swapped.
I've tested with a CY8C4125AXI-483 and confirmed
that the device is recognized correctly now.
Change-Id: I6fcbee33558d8feec9abf6052df3f15523379c48
Signed-off-by: George Ioakimedes <georgeioak@gmail.com>
Reviewed-on: http://openocd.zylin.com/3619
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
1986VE1T and 1986VE3T have issue with flash acceleration engine described
in their errata (issue 0007).
After programming flash acceleration engine's buffer contains old data,
and therefore first read data are wrong. Because of this verification after
programming fails always. Recommended workaround for the issue is to flush
flash accelerator's buffer. To do so it's necessary to read at least 64
bytes of flash through accelerator.
Reading bytes through JTAG using default_flash_read doesn't help.
It seems that reading should be done by uC itself.
Change-Id: I18ef464a68ad5c5b16d3933f31ca61f8e2e7cca3
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-on: http://openocd.zylin.com/3509
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
First, fix the timeval_ms() implementation to not have K&R but ANSI
argument semantics by adding a missing void.
timeval_ms() returns an int64_t, not uint64_t or long long. Consistently
use int64_t for variables and PRI*64 as format string.
While at it, change a few related variables to bool for clarity.
Note that timeval_ms() may return a negative error code, but not a
single caller checks for that.
Change-Id: I27cf83e75b3e9a8913f6c43e98a281bea77aac13
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3499
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This adds the 'data_swap' parameter to the CFI driver, which enables
swapping of data bytes when writing/programming words to the flash.
Note, that this specifically means that bytes are not swapped when
writing command words to the flash chip. Unless you are using the SAP
in an LS102x chip to program an attached 16-bit NOR flash, you hopefully
do not need this!
Change-Id: I1e6f7169da36f373c880d1756d9c21c9957acc50
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3109
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Also make GPL notices consistent according to:
https://www.gnu.org/licenses/gpl-howto.html
Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3488
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
When using SWD rather than JTAG transport, the lpcspifi driver complains:
Error: Device ID 0x0 is not known as SPIFI capable
Error: auto_probe failed
This is because target's JTAG tap->idcode is zero for SWD.
Drop this check completely and hardcode the addresses for now. Neither
the JTAG TAPID nor the SWD IDCODE are unique enough to detect the exact
chip model and thereby its memory map.
Change-Id: Ic230e3e989a3e1f1a5b3bae68bdb34e5ef55d392
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3089
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn
or CortexXn. Further it's Cortex-M0+, not M0plus.
Cf. http://www.arm.com/products/processors/index.php
Consistently write it the official way, so that it stops propagating.
Originally spotted in the documentation, it mainly affects code comments
but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output.
Found via:
git grep -i "Cortex "
git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu"
git grep -i "CortexM"
Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3483
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change type of use_raw to boolean. This parameter was already
assigned a boolean variable (in COMMAND_PARSE_ENABLE) and used
as a boolean.
Change-Id: I22f8308246cb25ec9ec2395599e406160410a2a8
Signed-off-by: Ivo Manca <pinkel@gmail.com>
Reviewed-on: http://openocd.zylin.com/3496
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Return ERROR_NAND_DEVICE_NOT_PROBED to prevent calling functions
from segfaulting when nand device has not yet been probed (ie nand
verify)
Change-Id: Ibc4da0aad00e6cc6c83008882b054d981453dc36
Signed-off-by: Ivo Manca <pinkel@gmail.com>
Reviewed-on: http://openocd.zylin.com/3495
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Initial release of Ambiq Micro Apollo flash driver
supporting our sub-threshold (low power) Cortex M4F part,
and Evaluation Kit.
We have been shipping openocd to our customers for about one year.
The EVK boards are SWD only using ftdi. We also use two of the
other COM instances to display debug information.
It takes about 15 seconds to flash 512K, and mass erase is
about 5 seconds.
Tested by internal verification group, FAE's, and customer sites.
Merged commit 'refs/changes/17/3417/1' as suggested. Makefile.am
and drivers.c follow the new format to avoid conflicts.
Removed unused fault_capture command.
Added documentation for flash driver.
Change-Id: Iae92d869369c6827244f0071f9cb522d8d91fed8
Signed-off-by: Rick Foos <rfoos@solengtech.com>
Reviewed-on: http://openocd.zylin.com/3230
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Clean up working area in case writing fails. Probably inherited from
armv7m_blank_check_memory(). Fix adapted from armv7m_checksum_memory().
Change-Id: I784bef481d1eba833ab6a9c34249fe9d43a16081
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3470
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The capability to lock the debug interface on EFM32
controllers was lacking in OpenOCD.
After receiving some pointers by zapb_ and PaulFertser
on IRC (thanks guys!) I have added this capability.
This works by writing the required bits in the debug
lock word to '0'.
Note: there is currently no way to re-enable the debug
interface from OpenOCD as doing this requires specific
pin wiggling that is currently not implemented yet.
However: having the capability to lock the debug interface
is useful when building a volume programming jig.
You can flash the program code, verify and then
lock the debug interface so that the device cannot
be read when it is deployed in the field.
Change-Id: If2d562dfdb4b95519785a4395f755d9ae3d0cf12
Signed-off-by: Lieven Hollevoet <hollie@lika.be>
Reviewed-on: http://openocd.zylin.com/3389
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If an error occurs during xmc4xxx_blank_check_memory() aka .erase_check,
it would break out of the loop over flash sectors and return ERROR_OK.
Instead return the error code so that tcl.c can notify the user.
Change-Id: Ie2c1b7933eef2b240b28f8a292634fbbf5b31706
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3425
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The parts are listed in Rev I of the Datasheet
Change-Id: Icdd9108a0f1f19f666fce79de7f25df9f46de866
Signed-off-by: Peter D. Gray <peter@conalgo.com>
Reviewed-on: http://openocd.zylin.com/3424
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
The XMC1000 family uses a very different flash interface from XMC4000.
Tested on XMC 2Go and XMC1100 Boot Kit.
Change-Id: I3edaed420ef1c0fb89fdf221022c8b04163d41b3
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3418
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Part IDs taken from
Atmel-42402C-SAM L22_Datasheet_Complete-01/2016
(revision C)
Change-Id: I1eb76a92097a8327da10faa0551e7fc962a549f8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3426
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Cortex-M0+ and M4 motor control MCUs KV10, KV11, KV30, KV31,
KV42, KV44 and KV46 added to SDID identification.
Watchdog disable code changed to work on Cortex-M0+ (KV1x)
Protection size set to 1K for 16K flash devices (KV10Z16)
- cherry picked from Andrey Smirnov's change #2051
Change-Id: Ia6f4868eaf7e2cb6ad6a736210c703a67e0027be
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3235
Tested-by: jenkins
Reviewed-by: Kyle Manna <kyle.manna@fuel7.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Change-Id: I55ab830aed34a02c53f3419facc81c7354368e30
Signed-off-by: Peter D. Gray <peter@conalgo.com>
Reviewed-on: http://openocd.zylin.com/3422
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Färber <afaerber@suse.de>
To avoid conflicts between flash drivers being added, consistently use
an alphabetical sort order for the three places new drivers get added:
* Makefile.am NOR_DRIVERS (note: automake disallows a trailing backslash)
* drivers.c struct flash_driver forward declarations
* drivers.c flash_drivers array
Change-Id: Idcd6a8e12821ef10958a6b3ad7bac0dc63cadd08
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3417
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Taken from git://git.ac6.fr/openocd commit e8ed67c42227b7072
STM32F446 (0x434) now is's own case.
Change-Id: I5061db7102b4c923c9f39d3d2f0cc69d29fca0a4
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3375
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Old code waited only for 7 bytes and didn't handle buffer wrap-around, but
was functional despite.
Change-Id: Iceaf7be1e51368b2ec0a8722cc9ac16d12f9aa63
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested with MKE04Z8VTG4, MKE02Z64VLC4 and MKE02Z64VLD2.
Change-Id: I606e32a2746a3b96d3e50f3656ba78d40c41c1ea
Signed-off-by: Ivan Meleca <ivan@artekit.eu>
Reviewed-on: http://openocd.zylin.com/3380
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
There is no reason why not probe running target.
Initial gdb connect to running target is now possible without
halt in gdb-attach event.
Change-Id: Iacc4a231587d378168b18db871582f1086504831
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3382
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add support for S6E2DH MainFlash. VFlash is not implemented.
Briefly tested with SK-FM4-176L-S6E2DH V110 board.
Change-Id: If7c523d8c75307bc1494bbf4cca3eed0272e8e01
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3158
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
These appear to be just additional flash size configurations.
Entirely based on manual, untested.
Change-Id: I4460dc1a588335df8fc0a385d24513a4e35b6951
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3157
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds necessary code to obtain data from the Info region which is
not memory-mapped so can't be read the usual way.
With this "flash read_bank" and "flash verify_bank" commands should
start to work as expected for the Info memory block.
Change-Id: I57e4b80fff577500cfa85954b625fe9c9ff92aa5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3227
Tested-by: jenkins
Reviewed-by: Eldar Khayrullin <eldar.khayrullin@mail.ru>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Instead of pointing to the assembler sources in a comment and
inline-commenting the THUMB bytecode, place the hex array alongside the
assembler sources and include it via preprocessor.
Originally inspired by a typo in the file path during driver development,
but it also facilitates making changes to the assembler sources.
A Makefile is provided to help automate updating the bytecode. It is not
integrated with the automake system to avoid forcing an ARM cross-compiler
onto every user, i.e. after modifying the sources they need to be rebuilt
in that directory before building the usual way. ARM_CROSS_COMPILE= can
be passed on the make command line to deal with native ARM toolchains
or with varying prefixes of cross-toolchains.
Change-Id: I00ceb980a68c8554a180dd13719ac77b677a8bcd
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3133
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The Spansion FM4 family of microcontrollers does not offer a way to
identify the chip model nor the flash size, except for Dual Flash vs.
regular layout. Therefore the family is passed as argument and
wildcard-matched - MB9BFx6x and S6E2CC families are supported.
Iterations showed that ...
1) Just doing the flash command sequence from SRAM loader code for each
half-word took 20 minutes for an 8 KB block.
2) Doing the busy-wait in the loader merely reduced the time to 19 minutes.
3) Significant performance gains were achieved by looping in loader code
rather than in OpenOCD and by maximizing the batch size across sectors,
getting us down to ~2 seconds for 8 KB and ~2.5 minutes for 1.1 MB.
(Tested with SK-FM4-176L-S6E2CC-ETH v11, CMSIS-DAP v23.)
gcc, objcopy -Obinary and bin2char.sh are used for automating the
integration of hand-written assembler snippets.
Change-Id: I092c81074662534f50b71b91d54eb8e0098fec76
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The Flash driver for at91sam4 cpu's has been enhanced to recognise and support the SAM4N family.
Change-Id: I50c471a6053b52edffd8efdd8abfe516cc5c55ee
Signed-off-by: Colin Helliwell <colin.helliwell@ln-systems.com>
Reviewed-on: http://openocd.zylin.com/3242
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Error found by static code analysis using the semantic pattern
null_ref2/mini_null_ref2.cocci, see coccinellery.org
Change-Id: Ic817c29f0ccf2b41fc8f7d9a480ad30d6e5b7ab8
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3364
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The flash info command on stellaris platformes
"TI/LMI Stellaris information ... rcc is ..., rcc2 is ..."
presented the actual RCC2 register as rcc and an uninitialized variable
as rcc2 due to a copy and paste error.
Found using the semantic pattern da/da.cocci, see coccinellery.org
Change-Id: I6f920fc3e07fdc085ea8e2248fbc9453eb8393dc
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3368
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
A struct member has been initialized twice. Found using the semantic
pattern da/da.cocci, see coccinellery.org
Change-Id: I0320afd60f1ba505758cc5bc0adcf27f572492fb
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3369
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Obsolete C source code semicolons were removed using the semantic patch
semicolon/semicolon.cocci, see coccinellery.org
Change-Id: I153b4995a9e028ebaf5f58c947821dc78345a777
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3367
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Writing to Intel CFI flash with unaligned tail bytes raised a false
error message although all data was programmed successfully. e.g.:
> flash write_image image 0x602e0000 bin
> Programming at 0x602e0000, count 0x00000002 bytes remaining
> couldn't write word at base 0x60000000, address 0x602e0000
> error writing to flash at address 0x60000000 at offset 0x002e0000
Root cause for this false error was a mixup of two result variables
introduced with ecc8041c.
Change-Id: Ib6b85293dbed946a36a307e5b198c47b901145bf
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3233
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a nRF51822 variant, not a nRF51422 variant.
Change-Id: Ia199e0afa39408d7391a9655bad47eba2fd85f14
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3105
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested with EES-AA revision chips on Relax Kit for 5V Shields and
Relax Lite Kit.
Change-Id: I17d4479657bad0516d4c10c2ad7e745d59e678b7
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3136
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
FTFx flash controller requires MCU in normal RUN mode.
Flash cannot be erased, programmed or blank checked in VLPR or HSRUN
modes.
VLPR mode is switched to RUN mode as it does not require any changes
in clock generator setting. VLPR can be active from reset on some
KLx devices (with some FOPT setting) so 'reset init' might not be
sufficient to get device to normal RUN.
Any other mode than RUN or VLPR is reported as an error.
Change-Id: I60f494ce0d534b04870c6219d9b05f66f7244433
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3012
Tested-by: jenkins
Command for partitioning FlexNVM to data flash and EEPROM blocks
Change-Id: Ia0ea65d72b0e5f23da330520284b0bd26435e444
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2991
Tested-by: jenkins
FlexRAM should be requested before any section programming.
Test FCNFG RAMRDY bit before issuing FTFx_CMD_SETFLEXRAM
to speed up operation and to cover pflash only devices.
Change-Id: Ib0f2d8e8ab8b1507cbf2b7f8565178ab79941f5d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2990
Tested-by: jenkins
kinetis_ftfx_command() did not use other struct flash_bank* members
than base->target. Switching first parameter to struct target*
enables use of kinetis_ftfx_command() without unnecessary bank
getting and probing.
Removed kinetis_securing_test: kind of dead code, same function
as command flash erase_address pad 0x400 0x10
Removed "NAND" word from help as flash is obviously NOR
Change-Id: I3f5fc295ef2bf42f3e913549949f2a36377f6367
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2988
Tested-by: jenkins
FlexNVM (data flash) is memory mapped at 0x10000000.
Driver used to send the same address to FTFx controller for erase/write ops.
This was wrong as FTFx accepts only low 24 bits of address.
To fix addressing for flash controller kinfo->prog_base was introduced.
Added FlexNVM protection check, blank check and data flash size calculation.
Blank check cannot use block operation on FlexNVM when EEPROM backup is enabled.
Removed non functional reassign logic and bank_ordinal stuff.
Now one can re-probe FlexNVM banks after nvm_partition change.
Change-Id: Ia60b938266963e5d056701278cdf7bf2f62a429a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2987
Tested-by: jenkins
This is for targets where flash controller has reverse endianness
compared to target. For these, the 'bus_swap' parameter can be given to the
CFI driver, which will cause command CFI commands to be written with
bytes swapped. This is only for x16 CFI flash.
Change-Id: I698b768e92e65d160232e90b0e81a824e3c81a46
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3041
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Commit fd43be0726 introduced a
regression: since the register names were changed from those
traditional for MIPS to common GDB scheme the code that makes use of
them needs to be changed accordingly.
This commit restores pic32mx flash driver functionality.
Change-Id: Id18c739390fae36737a02dc30c363d0444f53b96
Reported-by: Louis Rannou <louson@users.sf.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3206
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
niietcm4_write() buffer padding:
add correct buffer padding for 16 bytes.
Args check in FLASH_BANK_COMMAND_HANDLER():
first version of the driver had 7 args, current - 6. This patch will fix
error when flash is rejected (current k1921vk01t.cfg has flash bank init
with 6 args).
Timeouts in flash flag checking procedure:
increase timeouts in niietcm4_opstatus_check() and niietcm4_uopstatus_check()
cause there were problems in some hardware configurations.
JTAG ID:
wrong id in k1921vk01t.cfg replaced with right one.
Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Change-Id: I84296ba3eb4eeda4d4a68b18c94666f1269a500f
Reviewed-on: http://openocd.zylin.com/3171
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Move the mandatory dap_ap_select() call into the dap_queue_ap_read/write
wrapper.
This avoids the need for dap_ap_select() and the notion of a "current" AP
within target code.
Change-Id: I5cde8f3eef2c662f7458be6f3b3dd44ea693bd74
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3164
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
All AP operations should select the AP to use before calling it so
there's no point in restoring the previous value afterwards.
The explicit call to dap_ap_select() before all AP operations should be
moved into dap_queue_ap_read/write() which then would have to take the
AP as an argument instead of the DAP.
Change-Id: Icacb0c76ef2a5ac36b4d2f26b52ec01a8850286e
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3156
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
All mem_ap_* functions now make sure the SELECT register is updated with
the AP number that it's operating on. This shouldn't have to be handled
explicitly.
Change-Id: Ib193d8930fabb6a25715064355f98258c9580b5d
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3153
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Change the debug_ap and memory_ap fields of the cortex_a target and
the debug_ap field of the cortex_m target to be pointers to the
struct adiv5_ap instead of AP numbers in some known DAP.
This reduces the dependency on the DAP struct in the targets and
enables MEM-AP accesses to take the relevant AP as parameter.
Change-Id: I39d7b134d78000564b7eec5bff464adf0ef89147
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3147
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Prepare to support multiple cortex-m cores on one DAP. Uses mem_ap_sel_*
functions and removes mem_ap_* functions. Adds a new debug_ap
parameter to the cortex_m (currently set to zero as in existing code).
Change-Id: I6926029d1e7bf44a42d453d1aff349bda824ba72
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Reviewed-on: http://openocd.zylin.com/2983
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
They are only used to initialize the flash bank sectors and never modified.
Explicitly specify the array length while at it.
Cleanup before adding XMC4800 support.
Change-Id: I2985b9a9946b67798dbfd47d8b219d93a7ffc3da
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3131
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Problem
dap->ap_current is register value, not field value.
it restores invalid ap when it calls dap_ap_select(dap, ap_old) later.
* assume the current ap is 1, dap->ap_current value would be (1 << 24).
ap_old = dap->ap_current; <-- ap_old = 1<<24 = 0x1000000.
...
dap_ap_select(dap, ap_old); <-- select 0x1000000, not 1.
* All AP registers accessing fail afterwards.
One of the reproducible case(s): CORE residents in AP >= 1
dap_lookup_cs_component() being used to find PE(*).
In most cases, PE would be found in AP==0, hence the problem is hidden.
When AP number is 1, dap->ap_current would have the value of 1<<24.
Anyone get the AP value with dap->ap_current and resotre it later would
select the wrong AP and all accessing later would fail.
The ARM Versatile and/or FPGA would have better chance to provide this
kind of environment that PE residents in AP>=1. As they have an 'umbrella'
system at AP0, and main system at AP>=1.
* PE: Processing Element. AKA Core. See ARM Glossary at
http://infocenter.arm.com/help/topic/com.arm.doc.aeg0014g/ABCDEFGH.html
Fix
Use dap_ap_get_select() to get ap value.
a. Retrieve current ap value by calling dap_ap_get_select();
src/flash/nor/kinetis.c
src/target/arm_adi_v5.c
b. The code is correct (dap->ap_current >> 24), but it's better to use
dap_ap_get_select() so everything could be synchronized.
src/flash/nor/sim3x.c
Change-Id: I97b5a13a3fc5506cf287e299c6c35699374de74f
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/2935
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
http://support.code-red-tech.com/CodeRedWiki/DebugAccessChip
> Note that once you have recovered debug access to your MCU, then in most cases you should then modify your Debug Configuration to turn vector catch off again. If this is not done, then this can cause problems in some circumstances with some versions of the Code Red IDE. For example with NXP LPC13xx parts, connecting more than once to the MCU with vector catch enabled can lead to the part ID being incorrectly read - which can again cause debug connections to fail
This patch adds an alternative part ID for LPC1343. With this patch "program" command works fine for flashing.
Change-Id: I8632e898a4c33102455925d25715b4f4edfa1d97
Signed-off-by: Jakub Kubiak <jakub@kubiak.es>
Reviewed-on: http://openocd.zylin.com/2782
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This adds docs, example config, flash driver.
Driver is only supports K1921VK01T model for now.
Change-Id: I135259bb055dd2df1a17de99f066e2b24eae1b0f
Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Reviewed-on: http://openocd.zylin.com/3011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The probe and info methods had duplicate sections decoding family names
to generate a human friendly part name. Extract this to a common
helper.
Change-Id: I4c6309d83c601e154b7c14ad9c15c53854ee1e98
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/2932
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Basic basic support to get running, magic numbers taken from revision
0.90 of the reference manual.
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Change-Id: Iff6ab94d30698f056ef09f7a856b7285fed8f441
Reviewed-on: http://openocd.zylin.com/2931
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Kinetis driver checks MDM STAT register to detect secured state of MCU.
An unsecured clean device typically triggered a huge fat alarm message.
Now when driver detects secured state it tries to halt MCU and then
re-reads status register.
Command "mdm mass_erase" used to deassert reset when finished
and MCU started looping in hard fault - WDOG reset cycle.
Now "reset halt" is issued. Clean flash is not run after mass_erase.
Change-Id: I23f393509fbd8751d44ffc744ff2d67f1074f74e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3010
Tested-by: jenkins
Reviewed-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
SAMD driver suffered from following problems:
1) Flash was erased as an integral part of flash write.
It was not documented so with usual workflow it resulted
in erasing flash twice (and reducing flash lifespan)
and in almost double flashing time.
2) Sector erase was silently skipped if "is_erased" flag was set.
"is_erased" logic was not reliable, e.g. when a row write
was aborted after successful write of some pages, sector was
still considered as erased. "is_erased" flag could not
cope with flash writes from a user program.
3) Writing of a block with start address unaligned to a flash page
resulted in failed assert and OpenOCD abort.
4) Disabling cache in bit 18 of 16-bit halfword never worked.
MCU implements cache invalidate in hardware so there is no need
to take care about. This bug was reported by Tony DiCola.
New code does not erase flash in write operation.
Instead it traditionally relies on erasing flash beforehand.
"is_erased" logic and cache disabling is completely removed.
It simplifies write procedure a lot and flash write is now faster.
The change partly solves ticket #109 SAMD/SAM4L driver doubles flash erase.
Change-Id: I582b497d01a351575533a1f8c9810a4413be0216
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3045
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds support for the Atmel SAML21 variant B parts.
There is minimal change between the two variants, but in
variant B the automatic page write which the at91samd flash
driver relies on to be enabled is disabled by default.
With this patch the write row function will now issue a page write
command after each of the four pages in the row if the MANW (manual
write) bit is set. This also fixes flash write for the SAMC20/SAMC21
devices which have the MANW bit set by default as well.
I have also moved the device ID (DID) register bitfield extraction
from the find_part into helper macros. These can be used in the future
if there are more workarounds for specific devices.
Tested (programming) on:
ATSAML21-XPRO
ATSAML21-XPRO-B
SAMC21 Xplained Pro
SAMD21 Xplained Pro
SAMD20 Xplained Pro
Change-Id: I401a8aa1efd64730840c0d62cf49a1e880ea5900
Signed-off-by: Andreas Loehre <alohre@gmail.com>
Reviewed-on: http://openocd.zylin.com/2903
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Atmel introduced a "Device Service Unit" (DSU) that holds the CPU
in reset if TCK is low when srst (RESET_N) is deasserted.
Function is similar to SMAP in ATSAM4L, see http://openocd.zylin.com/2604
Atmel's EDBG adapter handles DSU reset correctly without this change.
An ordinary SWD adapter leaves TCK in its default state, low.
So without this change any use of sysresetreq or srst
locks the chip in reset state until power is cycled.
A new function dsu_reset_deassert is called as reset-deassert-post event handler.
It optionally prepares reset vector catch and DSU reset is released then.
Additionally SWD clock comment is fixed in at91samdXX.cfg and clock is
lowered a bit to ensure a margin for RC oscillator frequency deviation.
adapter_nsrst_delay 100 is commented out because is no more necessary after
http://openocd.zylin.com/2601
Change-Id: I42e99b1b245f766616c0a0d939f60612c29bd16c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2778
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
According to Infineon, XMC4500 EES AA13 with date codes before GE212 -
as seen on an XMC4500 General App Kit - had a zero SCU_IDCHIP register.
Handle this by extending our checks to not error out on zero SCU_IDCHIP
and by printing a useful info string in that case.
Change-Id: Ic2d641a314627dd5a1ff775a0113999191b95e3d
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2751
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
This is a complete flash driver for the Infineon XMC4xxx family of
microcontrollers, based on the TMS570 driver by Andrey Yurovsky.
The driver attempts to discover the particular variant of MCU via a
combination of the SCU register (to determine if this is indeed an
XMC4xxx part) and the FLASH0_ID register (to determine the variant).
If this fails, the driver will not load.
The driver has been added to the README and documentation.
Tests:
* Hardware: XMC4500 (XMC4500_relax), XMC4200 (XMC4200 enterprise)
* SWD + JTAG
* Binary: 144k, 1M
Note:
* Flash protect only partly tested. These parts only allow the flash
protection registers (UCB) to be written 4 times total, and my devkits
have run out of uses (more on the way)
Future Work:
* User 1/2(permalock) locking support via custom command
* In-memory flash loader bootstrap (flashing is rather slow...)
Change-Id: I1d3345d5255d8de8dc4175cf987eb4a037a8cf7f
Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2488
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This is a driver for the Atmel Cortex-M7 SAMV, SAMS, and SAME.
I started with the at91sam4.c driver and then restructured it
significantly to try to simplify it and limit the functionality
to just a flash driver, as well as to comply with the style guide.
Change-Id: I5340bf61f067265b8ebabd3adad45be45324b707
Signed-off-by: Morgan Quigley <morgan@osrfoundation.org>
Reviewed-on: http://openocd.zylin.com/2952
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
kinetis_write() with byte count not divisible by prog_section_chunk_bytes
computed wrong wc and therefore paded section chunk by some
random data instead of 0xff
Change-Id: Ic7c66d8a3ceacda9e611e98b9fbf943b8001774b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2994
Tested-by: jenkins
Reviewed-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Kx devices with FTFA flash need the watchdog disabled when programming.
I tried to keep overhead as small as possible and re-use registers that
were already inquired (e.g. sim_sdid).
Change-Id: Ibc29a26ec34102d78a6c3920dd16f63e134a8f6f
Signed-off-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-on: http://openocd.zylin.com/2986
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
K22FN1M0 and K22FX512 has FTFE flash and old style SDID.
K22FN128, 256 and 512 has FTFA flash and new style SDID
K63 and K64 detects as K61 and K62, see Errata 1N83J e7534
Change-Id: I2aca6f1f18819bb2b2ec4982036510de444ad2ac
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2867
Tested-by: jenkins
Reviewed-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Patrick Stewart <patstew@gmail.com>
max_flash_prog_size euals to pflash_sector_size_bytes for most of devices.
There is no point setting max_flash_prog_size for devices without
FS_PROGRAM_SECTOR capability.
Check for zero sector_size to avoid div by zero exception in case of
device has FlexNVM but the driver does not define nvm_sector_size_bytes
Change-Id: Iaf4e007fb1ec3d24c373350410e4bebe504a4c3e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2958
Tested-by: jenkins
Reviewed-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Patrick Stewart <patstew@gmail.com>
The K24 uses the KL-style SDID register and has some flashing quirks, so the kinetis driver does not support it properly.
Extend the chip detection routine to support the new SDID format. Add a parameter for the maximum flash size, as the K24 only supports 1k flashing blocks but has 4k sector size. Remove global 'granularity' array, as it's only really needed in one function. Replace 'klxx' with an enum showing which flash commands are actually supported on a given chip.
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Change-Id: Ie244fab564d58c5cfe4fa36a025f0b2674ffad69
Reviewed-on: http://openocd.zylin.com/2864
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Flash driver "mini51.c" and "nuc1x.c" are same target MCU.
This patch integrates each driver and functions,
and makes into new "NuMicro" flash driver.
Change-Id: Ifff5c1cfdd265acca0f489631695be9194fa144c
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2794
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
A target config and a simple flash driver for the ADuCM360 microcontroller.
The EEPROM of the chip may be erased and programmed.
Change-Id: Ic2bc2f91ec5b6f72e3976dbe18071f461fe503b8
Signed-off-by: Ivan Buliev <i.buliev@mikrosistemi.com>
Reviewed-on: http://openocd.zylin.com/2787
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Problem
As my compiler has "warnings being treated as errors" on, it shows the
error message:
error: 'retval' may be used uninitialized in this function
Investigation
Nothing wrong with the logic, 'retval' would have a value before returning.
Just wanna get rid of the compiling "warning as error" message.
Solution
Provide a reasonable default value
Change-Id: I712c15f82819c6c48bee9dceca8de4b18aeb29b0
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/2905
Tested-by: jenkins
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add the chip IDs corresponding to the new 5V "SAMC" parts which are
otherwise identical to the SAMD and should work with this driver. Also
add the configurations for their Xplained Pro boards.
Change-Id: Ic268d4ac384a3a77d4211a94da9f9faf4d8c0f7b
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2809
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This fixes a warning as reported by the current clang version:
../../../../src/flash/nor/sim3x.c:867:20: error: address of array
'sim3x_info->device_package' will always evaluate to 'true' .
Change-Id: Ie160cbe6df8f491e9beff38d47e2f13575529bf9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2838
Tested-by: jenkins
Reviewed-by: Oleksij Rempel
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Many FPGA board speak JTAG and have a SPI flash for their bitstream
attached to them. The SPI flash is programmed by first uploading a
proxy bitstream to the FPGA that connects the JTAG interface to the
SPI interface if the IR contains a certain USER instruction. Then the
SPI flash can be erase, written, read directly through the JTAG DR.
The JTAG and SPI signaling is compatible. Such a proxy bitstream only
needs to connect TDO-MISO, TDI-MOSI, TCK-CLK, and the activate the
chip select when the IR contains the special instruction and the JTAG
state machine is in the DR-SHIFT state.
Change-Id: Ibc21d793a83b36fa37e2704966aa5c837c4dd0d2
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2844
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The only read access to flash chips so is through the target's
memory. Flashes like jtagspi do not expose a memory mapped interface
to the flash. These commands use the flash_driver_read() driver API
directly.
Change-Id: I40b910de650114a3f676507f9f059a234377d862
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2842
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add the identifiers to support the flash on the Cypress Type-C Port Controller
chips of the CCG1 family : http://www.cypress.com/ccg1/.
Tested successfully on CYPD1132-16SXI.
Change-Id: I3fe6283379e5bcab964afac31b547ef95535aa2c
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-on: http://openocd.zylin.com/2757
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The notation Gx0 in the nRF51 Series Compatibility Matrix indicates that
the specified HWID is valid only for build code 0 of each chip, and for
subsequent builds the HWID will be different. Replace the Gx0 notation
with G0 throughout, and add the missing HWID for nRF51422 QFAC A1
(present on the newer nRF51 developer boards).
See: https://www.nordicsemi.com/eng/nordic/download_resource/41917/5/55913589
See: https://devzone.nordicsemi.com/question/30774/mapping-hwid-to-revision-information/
Change-Id: I79d842137d41342db35904867c48b06fbc6fbc70
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Signed-off-by: Angus Gratton <gus@projectgus.com>
Reviewed-on: http://openocd.zylin.com/2593
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This adds support for the new Atmel SAML21 family of low-power Cortex
M0+ devices. Their Flash controller is essentially the SAMDxx one so
the change consists of adding the new part IDs. Unfortunately the
device ID logic had a couple of mistakes in it that did not affect
anything on SAMD2x devices (due to 0 values expected there) but that is
a problem on L21, it's therefore addressed here and things should now
match the datasheets.
Tested on Amtel SAML21 Xplained Pro development kit against the included
SAML21J18A there. Also tested for regressions on a SAMD20 and SAMD21
using their dev kits.
Change-Id: I768f75e064b8656c15148730dacaa4c3acfc4101
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2690
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This adds the mandatory Info documentation for the driver as well as
the usage field.
As a clean up, this also includes freeing of the allocated memory
which results in a memory leak if probe is invoked multiple times.
Valgrind-tested.
Reported by Dmitry Shpak.
Change-Id: I2b1d9b9e8b069c6665b11d880b40ce19a1b26ce6
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2694
Tested-by: jenkins
Reviewed-by: Дмитрий Шпак <disona@yandex.ru>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch was tested with an EZR32WG Starter Kit.
Change-Id: I0f7c619e715fe30e88e6da3bead0806dd3bce819
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2700
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a remake of http://openocd.zylin.com/1966
originally written by Angus Gratton <gus@projectgus.com>
ATSAM4L has a "System Manager Access Port" (SMAP) that holds the CPU
in reset if TCK is low when srst (RESET_N) is deasserted.
Without this change any use of sysresetreq or srst locks the chip
in reset state until power is cycled.
A new function smap_reset_deassert is called as reset-deassert-post event handler.
It optionally prepares reset vector catch and SMAP reset is released then.
Change-Id: Iad736357b0f551725befa2b9e00f3bc54504f3d8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2604
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
In some circumstances (e.g. inappropriate jtag clock)
target_write_memory in lpc2000_iap_working_area_init might fail. The
allocated working area should be freed inside
lpc2000_iap_working_area_init in this error case.
This was leading to a weird segfault due to stack corruption later
when reset was executed.
Reported by quitte (Jonas Meyer).
Change-Id: Ia2ed42a9970a4d771727fd516a6eea88e9b859e2
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2696
Tested-by: jenkins
The IAP working area needs to be freed here, just like in all the
other driver functions since an automatic local variable is used to
store a pointer to it.
This was reported by quitte (Jonas Meyer) on IRC as a strange totally
unrelated segfault after doing certain operations (leading to target
reset) from GDB. He has provided me with remote access to the specific
machine and configuration that exposed the issue, and after some
debugging it became apparent that a auto local variable (holding the
gdb connection pointer) gets overwritten somehow. Placing an
appropriate breakpoint just before the event and using a watchpoint
made the cause apparent: reset lead to freeing of all working areas,
and there was one holding a pointer to a variable that was auto local
in get_lpc2000_part_id().
Change-Id: I7e634d890135ca0f3b4b311e09e8385a03982bd6
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2695
Tested-by: jenkins
This patch might influence openocd Tcl commands behaviour in subtle
ways, please give it a nice testing.
The idea is that if an OpenOCD Tcl command returns an error, an
exception is raised, and then the return code is propogated all the
way up (or to the "catch" if present). This allows to detect
"shutdown" which is not actually an error but has to raise an
exception to stop execution of the commands that follow it in the
script.
openocd_thread special-cases shutdown because it should then terminate
OpenOCD with a success error code, unless shutdown was called with an
optional "error" argument which means terminate with a non-zero exit
code.
Change-Id: I7b6fa8a2e24c947dc45d8def0008b4b007c478b3
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2600
Tested-by: jenkins
Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-by: Jens Bauer <jens@gpio.dk>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Current flash driver can fail to write across the sector boundary.
This patch fixes "thisrun_bytes" set to "cmd51_dst_boundary" value instead of "cmd51_can_xxxxb"
Referred to SevenW's post and fix,thanks.
http://sourceforge.net/p/openocd/mailman/openocd-devel/thread/fa32e7d6654df22470dc5f4a3dbc984a%40familiebenschop.nl/#msg33594152
Tested on below listed chips.
LPC810,LPC811,LPC812,LPC824,LPC1115,LPC1343,LPC1347,LPC1227,
LPC1769,LPC1788,LPC54102,LPC4088 and LPC2388.
Change-Id: If1c6a1daa58ca27c405bd959a784e599a7a8f4d4
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2607
Tested-by: jenkins
Reviewed-by: Jens Bauer <jens@gpio.dk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Many kinetis parts come in multi-bank configuration, so this
optimisation here can't be performed safely.
Investigated and fixed by Richard Braun.
Change-Id: I2b56614b47951595c403a1a8edd3afe11b85679b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2594
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by clang static checker.
Change-Id: Ifa58ba383092341c7343916e5cc8ec3c72ab2f60
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2560
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by clang static code checker.
Change-Id: Ic1370f8d7a48f08da6514afec5aacde38af7dfb6
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2559
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add support for the at90usb128 flash (tested on the RZUSBstick)
Change-Id: Ic042d7c403b20a5cc533da00c30ae6e2139bbd10
Signed-off-by: Olivier Esver <olg.esver@gmail.com>
Reviewed-on: http://openocd.zylin.com/2557
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Failed build on Mac OS X 10.10.2 was reported in OpenOCD-devel.
Cleaning types and printf formats. uint32_t prefered for flash/sector sizes.
2 minor changes in comments.
Removed redundant bracket.
Change-Id: Ia06b77af59c2c0ffd10869a4b263a760ca8b0a7a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2558
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Added new entries to the nrf51_known_devices_table array. New entries
are documented in the "nRF51 Series Compatability Matrix V1.0" found on
the Nordic Semi web site. Reordered entries to match the order found in
the document.
Also added an entry for an undocumented hwid discovered while flashing
the PCA10031 and PCA10028 dev boards.
Change-Id: Icca7da103d437dc28e651f27ab937fe953b9aac9
Signed-off-by: Theodore A. Roth <troth@openavr.org>
Reviewed-on: http://openocd.zylin.com/2514
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
RM0038 Rev.12 lists these new parts and introduces the category naming
scheme.
RM0367 Rev.2 (STM32L0x3 RM) doesn't add any new codes.
Change-Id: Id95dd48dda64d5f108dac57d265d29a7db3a1bd1
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2495
Tested-by: jenkins
OpenOCD's SWD subsystem doesn't currently have a consistent WAIT
handling (i.e. it doesn't ever retry, just returns an error), so right
after a row write a small delay is needed as AHB access is stalled
during the flashing operation.
The issue was exposed with a samd20 using ftdi SWD transport.
Change-Id: I07d99d3a96845cc689c3904a41f4d41344f200aa
Signed-off-by: Andrej Kazmin <funnyfish@funnyfish.botik.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2268
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This optional argument tells OpenOCD to exit after finishing (either
succesfully, or with an error) the programming sequence. Without it
OpenOCD stays running.
Change-Id: I6ecaf33ff985eea9a9cd02ff644a74403ae3e1e5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2492
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a new driver for Silicon Laboratories SiM3 microcontroller
family, based on the work of Ladislav Bábel. The driver will try to
detect the type of MCU from the device id register, and if this
fails it will use the flash size from the flash bank command.
Driver added to the documentation and to the README.
TCL script added.
Tests:
* Hardware: SiM3C166 (pre-production) and SiM3U167
* Binary: 4kb, 197kb, 256kb
* Flash protect not tested
Change-Id: I701e0cf505ca8ad99be7f83543fe5055b2f65dcc
Signed-off-by: Andreas Bomholtz <andreas@seluxit.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2078
Tested-by: jenkins
adds flash support for Nuvoton M052, M054, M058, M0516 microcontrollers
into the mini51 driver, patch also adds support for programing LDROM,
flash data and flash config.
I've tested it on a M0516LBN microcontroller using an ST-LINK/V2:
1. removing security lock:
openocd -f interface/stlink-v2.cfg -f target/m051.cfg -c "init ; halt ; mini51 chip_erase; exit"
2. flashing:
openocd -f interface/stlink-v2.cfg -f target/m051.cfg -c "program file.hex"
Change-Id: I918bfbb42461279c216fb9c22272d77501a2f202
Signed-off-by: Pawel Si <stawel+openocd@gmail.com>
Reviewed-on: http://openocd.zylin.com/2426
Tested-by: jenkins
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Change-Id: I53568674951ec8a5db5e191c7b50c60b5a84d0b6
Signed-off-by: Michael Brown <fractalmbrown@gmail.com>
Reviewed-on: http://openocd.zylin.com/2463
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
New NOR flash driver was derived from stm32lx.
Procedure ocd_process_reset_inner is overriden in psoc4.cfg
to handle reset halt and system ROM peculiarities.
Change-Id: Ib835324412d106ad749e1351a8e18e6be34ca500
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2282
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Commit 832f0a5bfb 'stm32: add mass erase support for STM32L' added
use of mass-erase in-place of bank-erase. This is triggered if first
bank is requested to be fully erased.
This erroneous action completely fails on STM32L162VEY (has 512 KiB
flash in two 256 KiB banks) and also unintently destroying contents of
EEPROM and second flash bank.
Change-Id: I0f13f7b0346747a09c755d72b5b95775ceff5a6f
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@haltian.com>
Reviewed-on: http://openocd.zylin.com/2441
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Topaz reports on http://sourceforge.net/p/openocd/tickets/87/ that
protection level constants are mixed up. This leads to device ending
up in protection level 1 after mass erase.
Additional work is required to actually put the device in RDP Level 1
and then back to Level 0, as Option bootloader launch is a special
kind of full target reset.
To be able to flash properly after mass_erase a "reset init" is needed
(it's anyway recommended to always perform it before any flash
operation).
Change-Id: I9a838909458039bb0114d3019723bf134fa4d7c9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2490
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add the new STM32F446 mcu with 512 Ko
Tested with a eval board
Change-Id: I0c16ce7d32d249c7634d697815207c20e7f778c4
Signed-off-by: prudhomme.remi@gmail.com
Reviewed-on: http://openocd.zylin.com/2484
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Do not use buf_set_u32 on integers; they're not buffers.
If using buf_set_u32 on integers, bytes will be exchanged on Big Endian targets.
In this particular case, FLASH_OPTCR was incorrectly written, causing it to often
contain one of these values: 0x00aaaae1, 0x00aaffef, 0x00ffabe1 or 0x00abffe1.
This write-protected the device before flash-programming, causing this command...
flash write_image erase unlock myfile.elf
... to fail, complaining about write-protection.
Repeating the above command would change the OPTCR register each time.
After applying this patch, the OPTCR remains "unchanged".
Change-Id: I73d510fcc2e81a01973ad5c6e1aa22715ebd2743
Signed-off-by: Jens Bauer <jens@gpio.dk>
Reviewed-on: http://openocd.zylin.com/2466
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Mass erase operation might be impacted by different factors,
apparently the most reliable way is to do it while asserting the chip
reset line.
Change-Id: Id6ab57eaec86e402ffdf4f5c8843e7735640f03e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2424
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
As of RM0091, Rev. 7, all F0 have the same revisioning scheme.
Change-Id: I0b344a1d3ca3f61f48fa151e83c549ca5333ae47
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2457
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds flash programming support for LPC5410x and LPC82x.
And adds auto flash size detection for LPC800 series.
Tested on below listed boards/chips.
LPC54102(LPCLPC54102Xpresso)
LPC824(LPCXpresso824-MAX)
LPC812(LPC812MAX)
LPC811,LPC810
Change-Id: Ie68b6d425b17ccfa83814607ee61056e99800c1c
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2442
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The IAP firmware won't return a proper status with some versions. This
happens on my CCC r0ket board and others have seen it as well [1]. So
just ignore the status code and do a (weak) consistency check instead.
[1] http://www.lpcware.com/content/forum/lpc1343-iap-read-part-identification-command
Change-Id: I0daa779d520a540629677c56857bbc20d6db422d
Signed-off-by: Grigori Goronzy <greg@chown.ath.cx>
Reviewed-on: http://openocd.zylin.com/2364
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
is_erased can be one of -1, 0, or 1 so it must not be checked like a
boolean value. In this case we want to erase a page unless we know it's
already erased so we just check for is_erased != 1.
Thanks to Jim Paris for pointing this out on another driver.
Change-Id: I4591186228153b64e5a9608a2aac18745e578d4a
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2368
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added the chip definition for the Atmel AT91SAM4S4A. This chip is a 48-pin
package with 256k flash and 64k ram.
Change-Id: I8ada7d5735e31e0ce086f96f5906c7358464245c
Signed-off-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-on: http://openocd.zylin.com/2254
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
After SPI flash was written by the assembly language stub,
the last SPI command was not terminated by raising CS.
This left the SPI device in a hung state that prevented the
flash from being read by the M4 SPIFI controller, even after
the M4 was fully reset. To access the flash via SPIFI, it was
necessary to completely power cycle the board.
This fix adds the missing instructions to raise CS and
terminate the SPI command after the last byte. This allows
the M4 to be resumed or reset cleanly after flashing. The
SPIFI memory is now immediately accessable at address
0x1400 0000 after flashing is complete.
Change-Id: I4d5e03bded0fa00c430c2991f182dc18611d5f48
Signed-off-by: Anders <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2359
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds flash programming support for LPC1547/8/9 and LPC1517/8/9.
Tested on LPC1549(LPC1549 LPCXpresso Board with CMSIS-DAP firmware).
Change-Id: Ic95b4d62055bb9fdc2ca484696a38ccaf49ad951
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2304
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Grigori G <greg@chown.ath.cx>
is_erased can take the value 0 (no), 1 (yes), or -1 (unknown).
Checks like (!is_erased) don't do the right thing if it's -1.
Change-Id: I10ba32c99494ca803e0a7a1ba56fdd78184b96bb
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2366
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If the UICR is already empty, there's no reason to return an error
just because it can't be erased again. This happens, for example,
when flashing UICR from GDB after a "monitor nrf51 mass_erase".
Change-Id: Ia6d28c43189205fb5a7120b1c7312e45eb32edb7
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2363
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
nrf51_erase_page() checks for (sector->offset == NRF51_UICR_BASE) to
determine if the UICR should be erased. However, sector->offset for
the UICR bank is set to 0 in nrf51_probe, so this code is never hit.
Attempting to erase UICR ends up erasing the first flash sector.
Use bank->base instead to determine if UICR is being erased.
Change-Id: Ie5df0f9732f23662085ae2b713d64968cd801472
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2362
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The UICR region is actually 0x100 bytes in size. Besides making the
full region accessible, having the right value is important because
GDB rounds flash addresses to the nearest multiple of the block size
when determing which flash blocks to erase.
Change-Id: I416c391cbfc7be41a03a9b9c6e42326c87391f38
Signed-off-by: Jim Paris <jim@jtan.com>
Reviewed-on: http://openocd.zylin.com/2361
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
The mass erase for STM32L was lack because the procedure is more complex
than the procedure for the STM32F4xx.
The reference manual RM0038 (L100 subfamily) page 79 is more accurate
than the reference manual for the STM32L0xx. On the L0, the mass-erase
erase also the EEPROM. This is a limit to mass erase on L0.
The mass erase procedure is a command of telnet interface.
Tested on Discovery L053 and Discovery L100.
Change-Id: I6a1d7a3669789aea89c59a006ab2d883f3d827ca
Signed-off-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-on: http://openocd.zylin.com/2319
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This should make protection work as expected on all stellaris
families, including the latest Tiva C Snowflake.
Run-time tested on TM4C123x (Blizzard).
Change-Id: Ia017edb119bec32382b08fc037b5bbc02dd9000c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2267
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is still limited to pre-Snowflake parts and the first 64K of
flash.
Change-Id: I9ca872ada3d1a87dba6261464b2a72a15eda5ecf
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2264
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
There were two problems with the _protect() feature:
1. The address written was off by a factor of two because the address
register takes 16-bit rather than 8-bit addresses. As a result the
wrong sectors were (un)protected with the protect command. This has
been fixed.
2. The protection settings issued via the lock or unlock region commands
don't persist after reset. Making them persist requires modifying the
LOCK bits in the User Row using the infrastructure described below.
The Atmel SAMD2x MCUs provide a User Row (the size of which is one
page). This contains a few settings that users may wish to modify from
the debugger, especially during production. This change adds commands
to inspect and set:
- EEPROM size, the size in bytes of the emulated EEPROM region of the
Flash.
- Bootloader size, the size in bytes of the protected "boot" section of
the Flash.
This is done by a careful read-modify-write of the special User Row
page, avoiding erasing when possible and disallowing the changing of
documented reserved bits. The Atmel SAMD20 datasheet was used for bit
positions and descriptions, size tables, etc. and testing was done on a
SAMD20 Xplained Pro board.
It's technically possible to store arbitrary user data (ex: serial
numbers, MAC addresses, etc) in the remaining portion of the User Row
page (that is, beyond the first 64 bits of it). The infrastructure used
by the eeprom and bootloader commands can be used to access this as
well, and this seems safer than exposing the User Row as a normal Flash
sector that openocd understands due to the delicate nature of some of
the data stored there.
Change-Id: I29ca1bdbdc7884bc0ba0ad18af1b6bab78c7ad38
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2326
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reference code for the SAMD2x disables caching in the NVM controller when
issuing NVM commands. Let's do this as well to be consistent and safer.
Add a "chip-erase" for the Atmel SAMD targets that issues a complete Chip Erase
via the Device Service Unit (DSU). This can be used to "unlock" or otherwise
unbrick a chip that can't be halted or inspected, allowing the user to reflash
with new firmware.
Add a "set-security" command which issues an SSB. Once that's done and the
device is power-cycled, the flash cannot be written to until a "chip-erase" is
issued. The chip-erase cannot be issued by openocd at this time because
the device will not respond to a request for the DAP IDCODE.
Change-Id: I80122f0bbf7e3aedffe052c1e77d69dc2dba25ed
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2239
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Previous to this version the code of handle_flash_probe_command would
probe a bank twice: first time by auto-probe through a call to
flash_command_get_bank and second time by calling the probe function
directly. This change adds a flash_command_get_bank_maybe_probe wich
is a more generic version of the flash_command_get_bank, that would
allow commands to decide whether auto-probing should be performed or
not.
Change-Id: If150ca9c169ffe05e8c7eba36338d333360811e3
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2093
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds support for QSPI flash controller driver for
Marvell's Wireless Microcontroller platform.
For more information please refer,
https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/
Following things have been tested on 88MC200 (Winbond W25Q80BV flash chip):
1. Flash sector level erase
2. Flash chip erase
3. Flash write in normal SPI mode
4. Flash fill (write and verify) in normal SPI mode
Change-Id: If4414ae3f77ff170b84e426a35b66c44590c5e06
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Reviewed-on: http://openocd.zylin.com/2280
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The new FL1-K family is replacing the FL-K family. The data from all
three was based on the datasheet. In addition the 8MB S25FL164K was
tested successfully with OpenOCD on a custom board.
Change-Id: Idafeed86da12a481c0db92cc0de7ba28f50c2252
Signed-off-by: Anders <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2281
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
It's possible for us to fail to read the part ID code so make sure that
part_info is initialized to NULL before attempting to do so, otherwise
we could proceed and use it uninitialized and then segfault.
Change-Id: I0a3f3d3947690b66f0981b5046340449521e0b33
Signed-off-by: Jack Peel <jack.peel@synapse.com>
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2276
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Luckily, TI's website has predictable URLs for the datasheets, so it
was trivial to download all the pdfs corresponding to the currently
available 71 TivaC devices. Then they were processed with pdftotext
and parsed by this script:
BEGIN { capture = -1 }
/^Device Identification 0 \(DID0\)$/ { state = "waitingclass0" }
/^Device Identification 1 \(DID1\)$/ { state = "waitingpartno0" }
/^CLASS$/ { if (state == "waitingclass0") state = "waitingclass"
else if (state == "waitingclass") capture = 4 }
/^PARTNO$/ { if (state == "waitingpartno0") state = "waitingpartno"
else if (state == "waitingpartno") capture = 4 }
(FNR == 3) { family = $2 }
{
if (capture >= 0) {
if (capture == 0) {
if (state == "waitingclass")
class = $0
else if (state == "waitingpartno")
partno = $0
}
capture--
}
}
END { print "{" class ", " partno ", \"" family "\"}," }
Change-Id: I6820c409fe535f08394c203276b5af4406fe8b92
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2262
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This should make current Tiva C parts usable apart from the protection.
Runtime tested on TM4C123GXL (Blizzard) and TM4C1294XL (Snowflake).
Change-Id: Ia64e9d39fbd2b7049578bbfade72435e5203ddf5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2257
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This adds initial support for the STM32L0 family, specifically the ID
code 417 variant. The 'L0 has 128B rather than 256B pages as well as a
different number of pages per sector. It also has several key registers
and register sets in different locations from the STM32L1xx parts.
This change therefore takes the opportunity to reorganize part information into
a const table (it was previously determined by a set of control statements) and
abstracts away some of the low-level details to make them generic for L1 and
L0 parts.
We also include the first bank's size (for dual bank parts) in the new
device information table (and correct that size for the 0x437 variant
which is 256 rather than 192KB).
The 'L0 parts will not use the built-in loader/helper for Flash writing.
Tested on STM32L053 (dicovery board and Nucleo board) and STM32L152
(discovery board).
Change-Id: I57f7a8ab02caee266de71b31ae82a50d85728a0b
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2200
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This was somehow missed in the chip ID table and of course that's
exactly the one on my board (as such, tested on hardware).
Change-Id: I212d7c729d979e0357f1d4635f40935e25fe6ff3
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2260
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The Atmel SAMR21 is a Atmel SAMD21 with an Atmel RF233 in one package (two
dies). Tested with the SAMR21 Xplained Pro eval kit.
Change-Id: I1d79ea05834b925d7ec810527206fe86854e684b
Signed-off-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-on: http://openocd.zylin.com/2194
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Kinetis-K series has ID:0x001C0000 on MDM-AP IDR register.
Other Kinetis(L/M/V/E) series have ID:0x001C0020.
Change-Id: Iada37038cd239f7331ba80a3673b36bf7e18c555
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2195
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add part IDs for the new SAMD10 and SAMD11 parts within the Atmel SAMD
family, they have the same Flash controller as the other samd parts and
should be supported by the at91samd driver. Compile-tested only.
Change-Id: I493ae96a7d7e8d19e607fd9a4b6544a982be42b3
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/2170
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The error message (with the usage field unpopulated) looks like this,
obviously missing at least a space before Usage:
Error: 'fm3' driver rejected flash bank at 0x00000000Usage (null)
Change-Id: I2a625676e784d02942823f972a201f7f4f810c68
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2161
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
HLAs do not provide direct DAP access, so the best we can do about it
is skipping it.
Change-Id: I877ef8fd2d86e40e7442a637cdba182cfd60e05a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2173
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Adds support for auto-probing on devices which support the IAP
Read Part ID command. Includes IDs for all LPC17XX, LPC13XX,
LPC11XX and LPC11XXX devices with publicly available user
manuals.
To use auto-probing, select the 'auto' lpc2000 variant.
Change-Id: Ic617c32925c9ebe0e9d9192ed8ddbfa08e9f0aaa
Signed-off-by: Cosmin Gorgovan <cosmin@linux-geek.org>
Reviewed-on: http://openocd.zylin.com/2075
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
LPC11(x)xx and LPC13xx devices are mostly compatible with the lpc1700
variant of the LPC2000 driver, but use a fixed flash sector size of 4KB.
Change-Id: I033515f4ff6bc61d3b9babd27096f78c99cea927
Signed-off-by: Cosmin Gorgovan <cosmin@linux-geek.org>
Reviewed-on: http://openocd.zylin.com/2071
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
stm32x_write_options is locking the FLASH_OPTCR register by
writing 0x00000001 to it, which clears the other bits. This
causes problems with subsequent flash operations; the hardware
is probably seeing the write protection bits in the register
set to '0' (protect), causing a WRPERR.
This patch ORs the value of the register with 0x00000001, so that
the only change is the lock bit itself.
Change-Id: I0e3ca9aa6563ce1b57a01fc0faf7563b6b85f620
Signed-off-by: Elliott Partridge <elliott.partridge@gmail.com>
Reviewed-on: http://openocd.zylin.com/2155
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The spifi_init_code blob is calling the spifi_init() function from the ROM.
This ROM function is making use of the stack. So if the stack pointer is
invalid, trying to execute this code leads to a double fault and the
target_run_algorithm() call return with an error.
This patch simply ensure that the stack pointer is properly setup before
calling the spifi_init() ROM function.
Change-Id: I42a2163cfc2c6dfe5ada97ae8eb2bb6d2e283ff7
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/1836
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Old version of the code had several problems, among them are:
* Located in a generic ADI source file instead of some Kinetis
specific location
* Incorrect MCU detection code that would read generic ARM ID
registers
* Presence of SRST line was mandatory
* There didn't seem to be any place where after SRST line assertion
it would be de-asserted.
* Reset was asserted after waiting for "Flash Controller Ready" bit
to be set, which contradicts official programming guide AN4835
* Mass erase algorithm implemented by that code was very strange:
** After mass erase was initiated instead of just polling for the
state of "Mass Erase Acknowledged" bit the code would repeatedly
initiate mass erase AND poll the state of the "Mass Erase
Acknowledged"
** Instead of just polling for the state of "Flash Mass Erase in
Progress"(bit 0 in Control register) to wait for the end of the
mass erase operation the code would: write 0 to Control
register, read out Status register ignoring the result and then
read Control register again and see if it is zero.
* dap_syssec_kinetis_mdmap assumed that previously selected(before
it was called) AP was 0.
This commit moves all of the code to kinetis flash driver and
introduces three new commands:
o "kinetis mdm check_security" -- the intent of that function is to be used as
'examine-end' hook for any Kinetis target that has that kind of
JTAG/SWD security mechanism.
o "kinetis mdm mass_erase"" -- This function removes secure status from
MCU be performing special version of flash mass erase.
o "kinetis mdm test_securing" -- Function that allows to test securing
fucntionality. All it does is erase the page with flash security settings thus
making MCU 'secured'.
New version of the code implements the algorithms specified in AN4835
"Production Flash Programming Best Practices for Kinetis K-
and L-series MCUs", specifically sections 4.1.1 and 4.2.1.
It also adds KL26 MCU to the list of devices for which this security
check is performed. Implementing that algorithm also allowed to simplify
mass command in kinetis driver, since we no longer need to write security
bytes. The result that the old version of mass erase code can now be
acheived using 'kinetis mdm mass_erase'
Tested on accidentally locked FRDM-KL26Z with KL26 Kinetis MCU.
Change-Id: Ic085195edfd963dda9d3d4d8acd1e40cc366b16b
Signed-off-by: Andrey Smrinov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2034
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
As exposed by arm-none-eabi build, fix the wrong modifiers.
Change-Id: Ia6ce7c5c1d40e95059525c3e5d81b752df2fea7c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2122
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Apparently this helper was never actually used, and current clang
produces an unused const variable warning, so it's breaking the build.
Change-Id: Ib088bef5e9c0a48942c1d417d46f738469ee7e28
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2076
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Some fixes to 'samd_protect' including:
- Fix a bug in which the value of 'set' parameter passed into the
function was ignored so it was impossible to remove flash
protection once it was set.
- Check the protection status of the sector via 'is_protected'
field of the corresponding 'flash_sector' structure to see if
any actual HW manipulations needs to be done.
- Change the way the errors during protection activation are
handled. Now even in the case of error in the middle of
protecting a number of sectors the subroutine would still update
the state of the sector protection in sectors array so as to
avoid cases where openocd thinks that the sector is not protected
while it actually is.
Change-Id: I4cc6445a98ec13bdd94c89f0711c17840738a215
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2027
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Bail early if trying to erase protected sector and also do not double-erase already
erased sectors.
Change-Id: Ic2d39af48c3b8e10e78d52dd978b9bc01f671c6a
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2026
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Bail early if trying to write to protected sector also mark the sector
we are writing to as dirty.
Change-Id: I892f83461792e1cc2dcccade7aa65717831a6805
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2025
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Remove 'first' and 'last' checks in 'samd_protect' since those
parameters are checked in 'handle_flash_erase_command'.
Change-Id: I30e5598a9ab656d81055f26cc63e291377605300
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2024
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
nRF51 doesn't have any sort of flash page cache so we need to write
all of the data on the word-by-word basis and poll for "Flash Ready"
bit each time.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: I8caffbf69ebf9a69915724704ddbe270d1bb8d92
Reviewed-on: http://openocd.zylin.com/2050
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
SoftDevice stack ihex binary, provided by Nordic expects being able to
write data necessary for its correct operation at the adresses inside UICR.
This patch exposes UICR region of flash as a second bank on the MCU to
facilitate that.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: Idbc140b8de027f60655f78043877b7c054eb06f9
Reviewed-on: http://openocd.zylin.com/2013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Unfortunately due to my oversight, the original version of the
nrf51_probe function contained useless code that read the contents of
DEVICEID[0] an DEVICEID[1] registers and did nothing about it(those
registers had nothing to do with the device type information anyway).
This commit fixes that code by changing its behavior to read the HWID
field of CONFIGID register and looking up the corresponding device
information in the know devices table. This information is useful
when choosing the versions of SDK and SoftDevice for the chip
using "nRF51822 compatibility matrix".
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: Ibd80b35460df4278e86e0c2500b7dcc876eec10c
Reviewed-on: http://openocd.zylin.com/2012
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
output for flash page writes
The offset wasn't being considered in the "full page" write codepath, so any
writes at an offset were actually written out starting from page 0.
Change-Id: I5e70a1f35f144b3edd1ce6d9df9af9b5da6cf194
Signed-off-by: Angus Gratton <gus@projectgus.com>
Reviewed-on: http://openocd.zylin.com/1965
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Nucleo F401 board uses STM32F401RE chip with new device id and
got more flash than existing devices (512K). This patch adds
new the identifier to probe functions so flashing will now work.
Change-Id: Ibe9c047c79244db0cfbb06610da9d84987b9f85a
Signed-off-by: Jens Hoffmann <jehoffma@gmail.com>
Reviewed-on: http://openocd.zylin.com/2037
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Additional information string appended to the 'flash info' output used
incorrect offsets and was missing a couple of fields.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: If131be021295cab6adfca7da03c2f0fb8dca7d42
Reviewed-on: http://openocd.zylin.com/2011
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
flash: at91sam4: add support for the SAMG53 family (this also covers the
SAMG51). The SAMG5x parts have an EEFC (enhanced embedded flash controller)
which seems to be identical to the EFC that the sam4 driver supports.
Add a script for the Xplained Pro G53 board, this has the onboard CMSIS-DAP
debugger and a SAMG53N19. Tested on this board and chip combination.
Change-Id: I12af50402cd2069b3c7380d92e6fe54816d6c045
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This fix can "erase flash" on using High Level Adapters by running algorithm.
Because fm3 flash commands must need true 16-bit memory access,
but High Level Adapters(ST-Link/TI-ICDI) can 8/32bit access only.
Tested on MB9BF618T and MB9AF112K with STLink/V2.
Change-Id: I849a8a8e8ae2b3e77717de04f7522cf718c915d7
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1944
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add support for EFM32 Wonder Gecko family to flash driver.
This family has Cortex M4F core.
Change-Id: If71511015403069e3e30cb9f19df12cd97ac49e8
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/1968
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added configuration to work with stm32f07x.
Tested on stm32f072discovery with libopencm3 stm32f0 blink example.
Change-Id: I63cdc9bf1f28f5951d6b4faac871cfde331c9c78
Signed-off-by: Kuldeep Singh Dhaka <kuldeepdhaka9@gmail.com>
Reviewed-on: http://openocd.zylin.com/1921
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Caught by clang on OS X. Reported by Steffanx on IRC.
Change-Id: Id77c7297c58e58c4e2aa8e5dafcb3a29a1f33f3d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1879
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Kinetis K-series have different guranuarity for each frequency model.
This patch adding more minute guranuarity detection.
And adopted mass erase command not only L-series but also K-series.
Tested on MK20DX32VLF5,MK10DX32VLF5,and MKL25Z128VLK4.
Change-Id: Iffef850d4b388463756a13faf02c3890bfc19acf
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1894
Tested-by: jenkins
Reviewed-by: Per Ekman <pekenator@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mateusz Kaduk <mateusz.kaduk@gmail.com>
Make the chip information lookup tables const (thanks to Spencer Oliver for
pointing this out). Also fix spacing on one macro. No functional changes.
Change-Id: I053c4951c2626b8aa4541a79673b500394ef08e8
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1874
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested with SAMD21J18A on the SAMD21 Xplained Pro board.
Change-Id: Ice9ebcd229ed038b3193baf92d910f9256d7ce91
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1873
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
IAP commands fail on programming LPC810 because it has only 1kByte of SRAM.
This patch is fixing cmd51_max_buffer suitable size for LPC810,LPC811 and
other LPC1000 series.
Tested on a LPC810,LPC812,LPC11u14,and LPC1114(DIP28).
Change-Id: Iecec9fd963cb63bdff4a7bd3bbf4f8b1a7c60fbd
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1843
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a new NOR Flash driver, "at91samd", which supports the
built-in Flash on Atmel's D-series Cortex M MCUs, starting with the D20.
Parts and their geometry are detected automatically using the DSU and
lookup schemes described in the D20 document, 42129F–SAM–10/2013.
Future D-series variants and families should presumably use this
controller as well (possibly with minor changes and improvements).
Tested on the SAMD20 Xplained Pro board, for which we also add the
corresponding Flash configuration.
Change-Id: Id8d3dd601e9f53121682d1a1190d0be4ea3b83eb
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1684
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a new NOR Flash driver, "at91sam4l", which supports the
built-in Flash on Atmel's low-power SAM4L family of Cortex M4 MCUs.
Parts and their geometry are detected automatically using the Chip ID
and lookup schemes described in document 42023E–SAM–07/2013.
Tested on AT91SAM4LC4CA via the SAM4L XPlained Pro development kit.
Change-Id: If73499dee92cc8ce231845244ea25c6984f6cecd
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1639
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
S25FL256S device tested on mbest LPC4357 EVM, S25S128S untested but
from the same data sheet.
Change-Id: Idf58416aab08671fe29d22c3c34c2118b25a9d45
Signed-off-by: Steve Moorby <steve.moorby60@gmail.com>
Reviewed-on: http://openocd.zylin.com/1844
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Try to detect the flash parameters based on the MCU SDID register. The hope
is that this works for K and KL series MCUs but it has only been tested on
a K21. YMMV.
Change-Id: Idfe71383a449065267f393b09ee3c3b24ac6a803
Signed-off-by: Per Ekman <pekenator@gmail.com>
Reviewed-on: http://openocd.zylin.com/1823
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Paul Fertser
Andreas Färber
Gabrielle Trotter
Tomas Vanek
Andreas Fritiofson
Michael Dietz
Peter Kuhar
Spencer Oliver
SASANO Takayoshi
Steven Stallion
Andreas Bolsch
Uwe Bonnes
George Ioakimedes
Olaf Lüke
Andrey Skvortsov
Esben Haabendal
Marc Schink
Ivo Manca
Rick Foos
Robert Jordens
Lieven Hollevoet
Peter D. Gray
Ivan Meleca
Colin Helliwell
Alexander Kurz
Peter A. Bigot
Jacob Rosenthal
Bogdan Kolbov
Patrick Stewart
Alamy Liu
Jakub Kubiak
Karl Palsson
Andreas Loehre
Jeff Ciesielski
Morgan Quigley
Mahavir Jain
Thomas Schmid
Maxime Coquelin
Alex Forencich
Nemui Trinomius
Ivan Buliev
Evan Hunter
Andrey Yurovsky
Vincent Palatin
Patrick Noffke
Olivier Esver
Theodore A. Roth
dmitry pervushin
Andrej Kazmin
Andreas Bomholtz
Angus Gratton
Pawel Si
Michael Brown
Jussi Kivilinna
Rémi PRUD’HOMME
Jens Bauer
Jörg Wunsch
Grigori Goronzy
Anders
Jim Paris
Andrey Smirnov
Marco Cruz
Cosmin Gorgovan
Elliott Partridge
Aurelien Jacobs
Jens Hoffmann
Joerg Fischer
Kuldeep Singh Dhaka
Steve Moorby
Per Ekman