WIP 100BASE-TX PHY
Go to file
Sean Anderson 86aee33477 Use MODULE variable for tests
Instead of listing out tested modules each time, use a variable.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-08-24 12:10:07 -04:00
rtl Move default_nettype/timescale declaration to common.vh 2022-08-24 12:04:10 -04:00
tb Make testbenches a module 2022-08-21 12:36:28 -04:00
.gitignore Ignore post-synthesis verilog 2022-08-21 12:36:36 -04:00
4b5b.gtkw Initial commit 2022-05-23 20:57:03 -04:00
Makefile Use MODULE variable for tests 2022-08-24 12:10:07 -04:00