Ignore post-synthesis verilog

These files are build artifacts. Ignore them. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-08-21 12:36:36 -04:00 · 2022-08-21 12:36:36 -04:00 · 799aeb92d6
parent 1e8b5adc42
commit 799aeb92d6
1 changed files with 1 additions and 0 deletions
--- a/.gitignore
+++ b/.gitignore
@ -4,6 +4,7 @@
 *.d
 *.json
 *.asc
+*.post.v

 # test artifacts
 __pycache__