ethernet/rtl
Sean Anderson 02069bceee pcs: Add false_carrier signal
This adds an explicit false carrier signal. Trying to determine this
condition the MDIO signals is tricky because BAD_SSD can last over
several cycles of CE. To make things easier, add a signal which is high
only once per event.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-11-05 12:37:18 -04:00
..
common.vh Automatically dump signals 2022-10-30 14:20:48 -04:00
descramble.v descramble: Pass through scrambled_valid 2022-11-05 11:54:39 -04:00
io.vh Add pmd 2022-08-06 14:02:44 -04:00
iverilog_dump.v Automatically dump signals 2022-10-30 14:20:48 -04:00
mdio.v Automatically dump signals 2022-10-30 14:20:48 -04:00
mdio_io.v Automatically dump signals 2022-10-30 14:20:48 -04:00
mdio_regs.v pcs: Add false_carrier signal 2022-11-05 12:37:18 -04:00
mii_io_rx.v Automatically dump signals 2022-10-30 14:20:48 -04:00
mii_io_tx.v Automatically dump signals 2022-10-30 14:20:48 -04:00
nrzi_decode.v Automatically dump signals 2022-10-30 14:20:48 -04:00
nrzi_encode.v Automatically dump signals 2022-10-30 14:20:48 -04:00
pcs.vh pcs: Split into rx/tx 2022-10-30 21:32:02 -04:00
pcs_rx.v pcs: Add false_carrier signal 2022-11-05 12:37:18 -04:00
pcs_tx.v pcs: Split into rx/tx 2022-10-30 21:32:02 -04:00
pmd_dp83223_rx.v pmd_dp83223: Delay signal_status by an additional clock 2022-10-30 22:02:32 -04:00
scramble.v scrambler: Fix wrone assignment type 2022-11-02 00:16:43 -04:00