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anlogic
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anlogic: support BRAM mapping
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2021-12-17 20:28:22 +08:00 |
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common
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Removing extra `default_nettype` lines
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2023-02-21 05:23:16 +13:00 |
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ecp5
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Genericising bug1836.ys
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2023-02-21 05:23:16 +13:00 |
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efinix
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efinix: Use `memory_libmap` pass.
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2022-05-18 17:32:56 +02:00 |
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fabulous
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fabulous: Add support for mapping carry chains
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2023-02-27 09:50:34 +01:00 |
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gatemate
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Testing TDP synth mapping
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2023-02-21 05:23:15 +13:00 |
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gowin
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gowin: Fix LUT RAM inference, add more models.
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2022-02-09 09:04:34 +01:00 |
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ice40
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Tests for ram_style = "huge"
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2023-02-21 05:23:15 +13:00 |
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intel_alm
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Fix for sync_ram_sdp not being final module
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2023-02-21 05:23:16 +13:00 |
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machxo2
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Update tests
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2023-03-20 09:58:41 +01:00 |
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nexus
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nexus: Use `memory_libmap` pass.
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2022-05-18 17:32:56 +02:00 |
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quicklogic
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quicklogic: ABC9 synthesis
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2021-04-17 20:54:58 +02:00 |
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xilinx
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Tests for ram_style = "huge"
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2023-02-21 05:23:15 +13:00 |
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run-test.sh
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Add default assignments to SB_LUT4
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2021-04-20 12:46:21 +02:00 |
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