yosys/passes/opt
Emil J cc17d5bb70
Merge pull request #4612 from georgerennie/george/opt_demorgan_zero_width
opt_demorgan: skip zero width cells
2024-11-20 13:33:16 +01:00
..
Makefile.inc Add opt_ffinv pass. 2022-05-13 23:02:30 +02:00
muxpack.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt.cc opt_merge: Add `-keepdc` option required for formal verification 2022-04-01 21:03:20 +02:00
opt_clean.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt_demorgan.cc opt_demorgan: skip zero width cells 2024-09-24 14:24:59 +01:00
opt_dff.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt_expr.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt_ffinv.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt_lut.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt_lut_ins.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt_mem.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt_mem_feedback.cc kernel/mem: Introduce transparency masks. 2021-08-11 00:04:16 +02:00
opt_mem_priority.cc opt_mem_priority: Fix non-ascii char in help message. 2021-12-09 00:56:14 +01:00
opt_mem_widen.cc Add opt_mem_widen pass. 2021-08-14 01:06:23 +02:00
opt_merge.cc Ignore $scopeinfo in opt_merge 2024-02-06 17:51:29 +01:00
opt_muxtree.cc opt_muxtree: Update port_off and port_idx even for constant bits 2021-06-11 12:06:35 +01:00
opt_reduce.cc opt_reduce: keep at least one input to $reduce_or/and cells 2024-09-25 16:21:19 +01:00
opt_share.cc opt_share: Fix input confusion with ANDNOT, ORNOT gates 2023-07-20 20:58:52 +01:00
pmux2shiftx.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
rmports.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
share.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
wreduce.cc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00