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.gitignore
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tests/techmap/run-test.sh to cope with *.ys
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2019-08-23 11:09:50 -07:00 |
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abc9.ys
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Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
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2020-01-15 16:42:16 -08:00 |
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aigmap.ys
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Add quick test
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2019-09-30 15:34:04 -07:00 |
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autopurge.ys
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Hell let's add the original #1381 testcase too
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2019-09-20 17:58:51 -07:00 |
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clkbufmap.ys
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clkbufmap: Add support for inverters in clock path.
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2019-11-25 20:40:39 +01:00 |
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cmp2lcu.ys
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+/cmp2lcu.v to work efficiently for fully/partially constant inputs
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2020-04-03 14:28:22 -07:00 |
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dff2dffs.ys
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Add -match-init option to dff2dffs.
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2019-09-11 19:38:20 +02:00 |
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dffinit.ys
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dffinit: Avoid setting init parameter to zero-length value.
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2020-04-14 19:52:19 +02:00 |
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extractinv.ys
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Added extractinv pass
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2019-09-19 04:02:48 +02:00 |
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iopadmap.ys
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iopadmap: Fix z assignment to inout port
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2020-04-02 18:15:04 +02:00 |
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mem_simple_4x1_cells.v
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Added tests/techmap/mem_simple_4x1
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2014-02-21 12:06:40 +01:00 |
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mem_simple_4x1_map.v
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Added read-enable to memory model
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2015-09-25 12:23:11 +02:00 |
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mem_simple_4x1_runtest.sh
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Fixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh
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2014-03-11 11:59:58 +01:00 |
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mem_simple_4x1_tb.v
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Added tests/techmap/mem_simple_4x1
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2014-02-21 12:06:40 +01:00 |
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mem_simple_4x1_uut.v
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Added tests/techmap/mem_simple_4x1
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2014-02-21 12:06:40 +01:00 |
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recursive.v
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Add test
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2019-08-20 20:05:16 -07:00 |
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recursive_map.v
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Add test
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2019-08-20 20:05:16 -07:00 |
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recursive_runtest.sh
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Add test
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2019-08-20 20:05:16 -07:00 |
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run-test.sh
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shiftx2mux: fix select out of bounds
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2020-02-05 16:41:09 -08:00 |
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shiftx2mux.ys
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shiftx2mux: fix select out of bounds
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2020-02-05 16:41:09 -08:00 |
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techmap_replace.ys
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techmap: Fix cell names with _TECHMAP_REPLACE_.*
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2020-03-23 11:17:07 +01:00 |
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wireinit.ys
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Fix _TECHMAP_REMOVEINIT_ handling.
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2019-09-27 18:34:12 +02:00 |
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zinit.ys
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tests: zinit for new types
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2020-04-14 13:08:37 -07:00 |
383fe4a4bc