yosys/passes/techmap
Clifford Wolf b86410b2ab More aggressive $macc merging in alumacc 2014-09-15 12:42:11 +02:00
..
.gitignore Renamed "stdcells.v" to "techmap.v" 2014-07-31 02:32:00 +02:00
Makefile.inc alumacc skeleton 2014-09-14 10:02:00 +02:00
alumacc.cc More aggressive $macc merging in alumacc 2014-09-15 12:42:11 +02:00
dfflibmap.cc Fixed inserting of Q-inverters in dfflibmap 2014-08-27 19:44:12 +02:00
extract.cc Changed frontend-api from FILE to std::istream 2014-08-23 15:03:55 +02:00
filterlib.cc Moved dfflibmap from passes/dfflibmap to passes/techmap 2013-10-16 15:32:26 +02:00
hilomap.cc Renamed port access function on RTLIL::Cell, added param access functions 2014-07-31 16:38:54 +02:00
iopadmap.cc Bugfix in iopadmap 2014-08-15 14:29:42 +02:00
libparse.cc Changed frontend-api from FILE to std::istream 2014-08-23 15:03:55 +02:00
libparse.h Changed frontend-api from FILE to std::istream 2014-08-23 15:03:55 +02:00
maccmap.cc Improved maccmap tree bit packing 2014-09-15 12:00:19 +02:00
simplemap.cc Removed $bu0 cell type 2014-09-04 02:07:52 +02:00
techmap.cc Fixed techmap_wrap for techmap_celltype 2014-09-14 15:34:36 +02:00