yosys/techlibs/quicklogic/qlf_k6n10f
Martin Povišer 22cc4aff51 quicklogic: Test TDP36K inference with initial data 2023-12-04 15:52:03 +01:00
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TDP18K_FIFO.v add example memory test 2023-12-04 15:52:03 +01:00
arith_map.v change ql-bram-types pass to use mode parameter; clean up primitive libraries 2023-12-04 15:52:02 +01:00
bram_types_sim.v change ql-bram-types pass to use mode parameter; clean up primitive libraries 2023-12-04 15:52:02 +01:00
brams_map.v merge brams_final_map.v into brams_map.v 2023-12-04 15:52:02 +01:00
brams_sim.v quicklogic: Add missing `RAM_INIT` param on TDP36K sim model 2023-12-04 15:52:03 +01:00
cells_sim.v quicklogic: Drop `blackbox` off `adder_carry` 2023-12-04 15:52:03 +01:00
dsp_final_map.v add dsp inference 2023-12-04 15:52:02 +01:00
dsp_map.v ql_k6n10f: Remove support for parameter-configured DSP variety 2023-12-04 15:52:02 +01:00
dsp_sim.v ql_k6n10f: Remove support for parameter-configured DSP variety 2023-12-04 15:52:02 +01:00
ffs_map.v change ql-bram-types pass to use mode parameter; clean up primitive libraries 2023-12-04 15:52:02 +01:00
generate_bram_types_sim.py quicklogic: Add `RAM_INIT` to specialized BRAM models 2023-12-04 15:52:03 +01:00
libmap_brams.txt add qlf_k6n10f architecture + bram inference 2023-12-04 15:52:02 +01:00
libmap_brams_map.v quicklogic: Test TDP36K inference with initial data 2023-12-04 15:52:03 +01:00
sram1024x18_mem.v add example memory test 2023-12-04 15:52:03 +01:00
ufifo_ctl.v add example memory test 2023-12-04 15:52:03 +01:00