yosys/passes
Clifford Wolf 8537c4d206 Renamed AbstractCellEdgesDatabase::add_cell() to add_edges_from_cell() 2016-07-25 16:39:25 +02:00
..
cmds Replaced "select -assert-limit" with -assert-max and -assert-min 2016-07-01 12:24:13 +02:00
equiv Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
fsm Minor bugfix in FSM reset state detection 2016-07-12 09:46:15 +02:00
hierarchy After reading the SV spec, using non-standard predict() instead of expect() 2016-07-21 13:34:33 +02:00
memory Don't sign-extend memory bram initialization data 2016-05-15 00:05:30 +02:00
opt After reading the SV spec, using non-standard predict() instead of expect() 2016-07-21 13:34:33 +02:00
proc Added "proc_mux -ifx" 2016-06-06 17:15:50 +02:00
sat Moved SatHelper::setup_init() code to SatHelper::setup() 2016-07-24 12:18:39 +02:00
techmap Bugfix in "abc -script" handling 2016-06-19 22:19:19 +02:00
tests Renamed AbstractCellEdgesDatabase::add_cell() to add_edges_from_cell() 2016-07-25 16:39:25 +02:00