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riscv
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yosys
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7f1a1759d7
yosys
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backends
History
Clifford Wolf
756b4064b2
Fixed "write_verilog -attr2comment" handling of "*/" in strings
2015-02-13 22:48:10 +01:00
..
blif
Fixed another bug in write_blif handling of $lut cells
2014-12-19 17:54:44 +01:00
btor
Added ENABLE_NDEBUG makefile options
2015-01-24 12:16:46 +01:00
edif
Added EDIF backend support for multi-bit cell ports
2015-02-01 15:43:35 +01:00
ilang
Shorter "dump" options
2015-01-31 23:52:36 +01:00
intersynth
namespace Yosys
2014-09-27 16:17:53 +02:00
smt2
Various fixes and improvements in "write_smt2 -bv"
2014-12-25 20:28:34 +01:00
spice
Renamed extend() to extend_xx(), changed most users to extend_u0()
2014-12-24 09:51:17 +01:00
verilog
Fixed "write_verilog -attr2comment" handling of "*/" in strings
2015-02-13 22:48:10 +01:00