mirror of https://github.com/YosysHQ/yosys.git
7f12d0ba95
Adds TDP submodule to generator. Adds shorthand expected signal to testbench (mostly to make it easier when I look at the vcd dump to figure out what I did wrong in tests). |
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| .. | ||
| anlogic | ||
| common | ||
| ecp5 | ||
| efinix | ||
| fabulous | ||
| gatemate | ||
| gowin | ||
| ice40 | ||
| intel_alm | ||
| machxo2 | ||
| nexus | ||
| quicklogic | ||
| xilinx | ||
| run-test.sh | ||