mirror of https://github.com/YosysHQ/yosys.git
652a1b9806
The B port is for single-bit summands. These can just as well be represented as an additional summand on the A port (which supports summands of arbitrary width). An upcoming `$macc_v2` cell won't be special-casing single-bit summands in any way. In preparation, make the following changes: * remove the `bit_ports` field from the `Macc` helper (instead add any single-bit summands to `ports` next to other summands) * leave `B` empty on cells emitted from `Macc::to_cell` |
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| .. | ||
| Makefile.inc | ||
| muxpack.cc | ||
| opt.cc | ||
| opt_clean.cc | ||
| opt_demorgan.cc | ||
| opt_dff.cc | ||
| opt_expr.cc | ||
| opt_ffinv.cc | ||
| opt_lut.cc | ||
| opt_lut_ins.cc | ||
| opt_mem.cc | ||
| opt_mem_feedback.cc | ||
| opt_mem_priority.cc | ||
| opt_mem_widen.cc | ||
| opt_merge.cc | ||
| opt_muxtree.cc | ||
| opt_reduce.cc | ||
| opt_share.cc | ||
| pmux2shiftx.cc | ||
| rmports.cc | ||
| share.cc | ||
| wreduce.cc | ||