yosys/passes
Clifford Wolf 611f121cb9 Fixed "scc" for cells that have feedback singals _and_ are part of a larger loop 2016-05-27 16:33:13 +02:00
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cmds Fixed "scc" for cells that have feedback singals _and_ are part of a larger loop 2016-05-27 16:33:13 +02:00
equiv Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
fsm Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
hierarchy Made the expansion order of hierarchy deterministic 2016-05-22 16:41:26 +02:00
memory Don't sign-extend memory bram initialization data 2016-05-15 00:05:30 +02:00
opt Connections between inputs and inouts are driven by the input 2016-04-26 19:49:05 +02:00
proc Fixed proc_mux performance bug 2016-04-25 10:43:04 +02:00
sat Added "yosys -D" feature 2016-04-21 23:28:37 +02:00
techmap Added support for "keep" attribute to shregmap 2016-05-07 09:33:16 +02:00
tests Improvements and fixes in autotest.sh script and test_autotb 2016-05-20 16:58:02 +02:00