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Marcelina Kościelnicka 4e70c30775 FfData: some refactoring. 
- FfData now keeps track of the module and underlying cell, if any (so
  calling emit on FfData created from a cell will replace the existing cell)
- FfData implementation is split off to its own .cc file for faster
  compilation
- the "flip FF data sense by inserting inverters in front and after"
  functionality that zinit uses is moved onto FfData class and beefed up
  to have dffsr support, to support more use cases
 		2021-10-07 04:24:06 +02:00
..
aiger switch argument order to work with macOS getopt 2020-09-23 12:48:26 +02:00
arch FfData: some refactoring. 2021-10-07 04:24:06 +02:00
asicworld Fix FIRRTL to Verilog process instance subfield assignment. 2019-02-25 16:18:13 -08:00
bind Add support for parsing the SystemVerilog 'bind' construct 2021-07-16 09:31:39 -04:00
blif tests/blif: Add missing gitignore 2021-05-20 12:49:51 +02:00
bram tests/bram: Do not generate write address collisions. 2021-03-08 16:53:03 +01:00
errors Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique, 2018-10-25 02:37:56 +03:00
fsm tests: fsm to use a randomly-generated seed 2020-04-24 14:31:33 -07:00
hana Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
liberty dfflibmap: Refactor to use dfflegalize internally. 2020-07-09 18:51:03 +02:00
lut Forgot to commit 2019-07-16 12:44:26 -07:00
memfile Added 'set -e' into tests/memfile/run-test.sh 2020-02-06 10:45:40 -03:00
memories Add opt_mem_widen pass. 2021-08-14 01:06:23 +02:00
opt memory_share: Add -nosat and -nowiden options. 2021-08-14 00:09:04 +02:00
opt_share tests: Parallelize 2020-09-21 15:07:02 +02:00
proc proc_prune: Make assign removal and promotion per-bit, remember promoted bits. 2021-08-14 15:26:11 +02:00
realmath Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
rpc rpc test: make frontend listen before launching yosys & introduce safeguard if yosys errors 2020-03-06 15:29:01 +01:00
sat assertpmux: Fix crash on unused $pmux output. 2021-02-22 23:30:28 +01:00
select Merge pull request #1949 from YosysHQ/eddie/select_blackbox 2020-04-22 15:35:05 -07:00
share Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
simple Fix "make vgtest" so it runs to the end (but now it fails ;) 2021-09-23 14:54:28 +02:00
simple_abc9 abc9: fix SCC issues (#2694) 2021-03-29 22:01:57 -07:00
smv Progress in SMV back-end 2015-06-19 14:08:46 +02:00
sva Fix "verific -extnets" for more complex situations 2019-03-26 14:17:46 +01:00
svinterfaces Add a test for interfaces on modules loaded on-demand 2021-07-14 22:54:50 -04:00
svtypes sv: improve support for wire and var with user-defined types 2021-08-12 22:41:41 -06:00
techmap FfData: some refactoring. 2021-10-07 04:24:06 +02:00
tools memory_dff: Remove now-useless write port handling. 2021-03-08 20:16:29 +01:00
unit Build hotfix in tests/unit/Makefile 2016-12-11 10:58:49 +01:00
various More deadname stuff 2021-06-09 12:40:33 +02:00
verilog sv: support wand and wor of data types 2021-09-21 14:52:28 -04:00
vloghtb Use HTTPS for website links, gatecat email 2021-06-09 12:16:56 +02:00
gen-tests-makefile.sh tests: Parallelize 2020-09-21 15:07:02 +02:00