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APPNOTE_011_Design_Investigation
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Finished AppNote 011
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2013-12-08 15:12:32 +01:00 |
FILES_Eval
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
FILES_Prog
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Large improvements in yosys-config
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2013-11-19 23:04:27 +01:00 |
FILES_StateOfTheArt
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
.gitignore
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AppNote 010 progress
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2013-11-23 18:52:41 +01:00 |
APPNOTE_010_Verilog_to_BLIF.tex
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Fixed bug in example prog in appnote 011
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2013-12-05 18:15:14 +01:00 |
APPNOTE_011_Design_Investigation.tex
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Finished AppNote 011
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2013-12-08 15:12:32 +01:00 |
CHAPTER_Appnotes.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_Approach.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_Auxlibs.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_Auxprogs.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_Basics.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_CellLib.tex
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Added correct handling of $memwr priority
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2014-01-03 00:22:17 +01:00 |
CHAPTER_Eval.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_Intro.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_Optimize.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_Overview.tex
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Updated manual
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2013-09-15 11:41:05 +02:00 |
CHAPTER_Prog.tex
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Added stubnets example to manual prog chapter
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2013-08-07 02:19:35 +02:00 |
CHAPTER_StateOfTheArt.tex
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
CHAPTER_Techmap.tex
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Moved common techlib files to techlibs/common
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2013-09-15 11:52:57 +02:00 |
CHAPTER_Verilog.tex
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Added RTLIL and Liberty syntax highlighting to manual
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2013-07-25 14:00:16 +02:00 |
command-reference-manual.tex
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Updated manual/command-reference-manual.tex
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2013-12-28 12:14:47 +01:00 |
literature.bib
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |
make.sh
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Updated manual
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2013-09-15 11:41:05 +02:00 |
make_appnotes.sh
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Progress on AppNote 011
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2013-12-07 11:58:55 +01:00 |
manual.tex
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Fixed comments in manual rtlil/ilang syntax
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2013-07-25 15:01:02 +02:00 |
weblinks.bib
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Added Yosys Manual
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2013-07-20 15:19:12 +02:00 |