18 Commits

Author	SHA1	Message	Date
Eddie Hung	a37574ccbf	Fix muxAB logic	2019-07-23 14:52:14 -07:00
Eddie Hung	dc0c853abe	Simplify and fix for MACs	2019-07-23 14:20:34 -07:00
Eddie Hung	4f11ff8ebd	Fix typo	2019-07-23 13:58:56 -07:00
Eddie Hung	068617f094	Pack hi and lo registers separately	2019-07-22 16:12:57 -07:00
Eddie Hung	4d71ab384d	Rename according to vendor doc TN1295	2019-07-22 15:08:26 -07:00
Eddie Hung	304cefbbe2	Pack Y register	2019-07-22 15:05:16 -07:00
Eddie Hung	5a14b6e1f6	Pack adders not just accumulators	2019-07-22 13:01:49 -07:00
Eddie Hung	e0720a8018	Restore old ffY behaviour	2019-07-19 22:47:08 -07:00
Eddie Hung	f9d08a5e5e	Cleanup	2019-07-19 20:25:28 -07:00
Eddie Hung	9ad11ea2cc	Fine tune ice40_dsp.pmg, add support for packing subsets of registers	2019-07-19 10:57:32 -07:00
Eddie Hung	09411dd996	ice40_dsp to accept $__MUL16X16 too	2019-07-18 15:38:28 -07:00
Clifford Wolf	9f792c599d	Add pmgen support for multiple patterns in one matcher ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-04-29 13:02:05 +02:00
Clifford Wolf	dca65d83a0	Detect and reject cases that do not map well to iCE40 DSPs (yet) ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-02-20 11:18:19 +01:00
Clifford Wolf	5a853ed46c	Add actual DSP inference to ice40_dsp pass ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-02-17 15:35:48 +01:00
Clifford Wolf	d45379936b	Progress in pmgen ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-01-15 11:23:25 +01:00
Clifford Wolf	1f8e76f993	Progress in pmgen ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-01-15 11:23:25 +01:00
Clifford Wolf	b9545aa0e1	Progress in pmgen ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-01-15 11:23:25 +01:00
Clifford Wolf	ad69c668ce	Add mockup .pmg (pattern matcher generator) file ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-01-15 11:23:25 +01:00