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yosys
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3940 Commits

Author SHA1 Message Date
Andrew Zonenberg 1b42e0c471 Reduced log verbosity 2016-03-30 22:03:50 -07:00
Andrew Zonenberg ad19e0c64a Continued work on counter extraction. Can recognize compatible RTL counters but not replace with hard macros. 2016-03-30 21:54:23 -07:00
Andrew Zonenberg d16d05e415 Merge https://github.com/cliffordwolf/yosys 2016-03-30 20:38:18 -07:00
Andrew Zonenberg 94a6923e7d Updated tech lib for greenpak4 counter with some clarifications 2016-03-30 20:30:25 -07:00
Andrew Zonenberg dd7204c0bd Fixed typo in log message 2016-03-30 20:30:03 -07:00
Clifford Wolf 0db53284fd We have 2016 for a while now 2016-03-30 13:52:26 +02:00
Clifford Wolf 48dbc75bed Added .vhd file extension support 2016-03-30 13:24:49 +02:00
Andrew Zonenberg 489caf32c5 Initial work on greenpak4 counter extraction. Doesn't work but a decent start 2016-03-30 01:07:20 -07:00
Clifford Wolf 2c15a3a9d0 Merge branch 'master' of github.com:cliffordwolf/yosys 2016-03-30 10:02:18 +02:00
Clifford Wolf a47f69536a Added support for installed plugins 2016-03-30 10:02:03 +02:00
Andrew Zonenberg 3ea6026648 Added splitnets to synth_greenpak4 2016-03-29 20:02:59 -07:00
Clifford Wolf 19c20235b5 Added more cell help messages 2016-03-29 15:14:43 +02:00
Clifford Wolf 8c8b2e72b1 Fixed indenting in techlibs/greenpak4/gp_dff.lib 2016-03-29 13:44:14 +02:00
Clifford Wolf d4472ae945 Merge pull request #141 from azonenberg/master 
Add Greenpak4 SYSRESET block support
 2016-03-29 09:53:35 +02:00
Andrew Zonenberg 75f0030458 Added keep constraint to GP_SYSRESET cell 2016-03-28 23:16:43 -07:00
Andrew Zonenberg ea9cc03092 Added GP_SYSRESET block 2016-03-28 22:49:46 -07:00
Clifford Wolf 95784437ac Merge pull request #137 from ravenexp/master 
Embed DATDIR make variable value into yosys binary.
 2016-03-28 16:54:23 +02:00
Clifford Wolf 2ec832ddce Merge pull request #138 from SebKuzminsky/help-typo 
fix a cut-n-paste error in the -h help
 2016-03-28 16:53:47 +02:00
Clifford Wolf aade2c21fa Merge pull request #139 from azonenberg/master 
Add GreenPak4 LF oscillator support, renamed internal cell for consistency
 2016-03-28 16:53:24 +02:00
Andrew Zonenberg 3197b6c372 Added GP_COUNT8/GP_COUNT14 cells 2016-03-26 23:29:02 -07:00
Andrew Zonenberg 31a7567aff Changed GP_LFOSC parameter configuration 2016-03-26 14:13:52 -07:00
Andrew Zonenberg 44fd3cd149 Added GP_LFOSC cell 2016-03-26 13:42:53 -07:00
Andrew Zonenberg af15b92c86 Renamed GP4_V* cells to GP_V* for consistency 2016-03-26 13:42:41 -07:00
Sebastian Kuzminsky 73870c1edf fix a cut-n-paste error in the -h help 2016-03-26 11:15:35 -06:00
Sergey Kvachonok 963c0d2525 Embed DATDIR make variable value into yosys binary. 
Use it as the last resort in the share/ directory location search.
 2016-03-26 11:16:53 +03:00
Clifford Wolf a922d705d4 Merge pull request #136 from ravenexp/master 
Minor Makefile adjustments
 2016-03-25 09:16:45 +01:00
Sergey Kvachonok e14055edf0 Optionally use ${CC} when compiling test utils. 
Default to gcc when not set.
 2016-03-25 10:35:42 +03:00
Sergey Kvachonok d53a16e43a Allow redefining pkg-config Makefile command. 
Example usage:

$ make CXX=i686-w64-mingw32-g++ PKG_CONFIG=i686-w64-mingw32-pkg-config
 2016-03-25 10:35:42 +03:00
Sergey Kvachonok 972f4a9616 Allow redefining binary and data install locations. 
Add three more Makefile variables in addition to PREFIX:

$ make BINDIR=/.../bin LIBDIR=/.../lib DATDIR=/.../share/yosys

The defaults are:

BINDIR = $(PREFIX)/bin
LIBDIR = $(PREFIX)/lib
DATDIR = $(PREFIX)/share/yosys
 2016-03-25 10:35:42 +03:00
Clifford Wolf 5328a85149 Do not set "nosync" on task outputs, fixes #134 2016-03-24 12:16:47 +01:00
Clifford Wolf 9717495401 Fixed handling of inverters (aka 1-input luts) in nlutmap 2016-03-23 08:56:08 +01:00
Clifford Wolf b4bf787f10 Added GP_DFFS, GP_DFFR, and GP_DFFSR 2016-03-23 08:46:10 +01:00
Clifford Wolf 456c10f16e Added GP_DFF INIT parameter 2016-03-23 08:12:54 +01:00
Clifford Wolf 4f2ea221dc Added ast.h to exported headers 2016-03-22 14:46:10 +01:00
Clifford Wolf 043fa0fad0 Cleanup abstract modules at end of "hierarchy -top" 2016-03-21 16:37:35 +01:00
Clifford Wolf 2c7e107d7a Support for abstract modules in chparam 2016-03-21 16:37:35 +01:00
Clifford Wolf 4f0d4899ce Added support for $stop system task 2016-03-21 16:19:51 +01:00
Clifford Wolf ca8f8e30f2 Improvements in synth_greenpak4, added -part option 2016-03-21 09:44:52 +01:00
Clifford Wolf bb9374b67c Improvements in ABCEXTERNAL handling 2016-03-19 20:02:40 +01:00
Clifford Wolf b471a32ec3 Merge pull request #130 from ravenexp/master 
Support calling out to an external ABC.
 2016-03-19 19:46:27 +01:00
Sergey Kvachonok 2656b2c55a Support calling out to an external ABC. 
$ make ABCEXTERNAL=my-abc && make ABCEXTERNAL=my-abc install

configures yosys to use an external ABC executable instead of
building and installing the in-tree ABC copy (yosys-abc).
 2016-03-19 18:36:18 +03:00
Clifford Wolf e5d42ebb4d Added $display %m support, fixed mem leak in $display, fixes #128 2016-03-19 11:51:13 +01:00
Clifford Wolf ff5c61b120 Added black box modules for all the 7-series design elements (as listed in ug953) 2016-03-19 11:09:10 +01:00
Clifford Wolf ef4207d5ad Fixed localparam signdness, fixes #127 2016-03-18 12:15:00 +01:00
Clifford Wolf b6d08f39ba Set "nosync" attribute on internal task/function wires 2016-03-18 10:53:29 +01:00
Clifford Wolf 33c10350b2 Fixed Verilog parser fix and more similar improvements 2016-03-15 12:22:31 +01:00
Andrew Becker 81d4e9e7c1 Use left-recursive rule for cell_port_list in Verilog parser. 2016-03-15 12:03:40 +01:00
Clifford Wolf 2a8d5e64f5 Bugfix in write_verilog for RTLIL processes 2016-03-14 13:03:28 +01:00
Clifford Wolf dac807fb33 Cleanups and improvements in examples/cmos/ 2016-03-11 11:30:01 +01:00
Clifford Wolf 3265795154 Merge commit 'b34385ec924b6067c1f82bdbae923f8062518956' 2016-03-11 11:10:44 +01:00