Eddie Hung
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2d85725604
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Get rid of compiler warnings
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2019-06-14 13:07:56 -07:00 |
Eddie Hung
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a632799d5b
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Update abc9 -D doc
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2019-06-14 12:29:46 -07:00 |
Eddie Hung
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e391fc8e7b
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Enable "abc9 -D <num>" for timing-driven synthesis
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2019-06-14 12:28:01 -07:00 |
Eddie Hung
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a48b5bfaa5
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Further cleanup based on @daveshah1
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2019-06-14 12:25:06 -07:00 |
Eddie Hung
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751e640c1d
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Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig
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2019-06-14 10:29:16 -07:00 |
Eddie Hung
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a5425a2f7e
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Remove extra semicolon
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2019-06-14 10:11:34 -07:00 |
David Shah
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9566573054
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ecp5: Add abc9 option
Signed-off-by: David Shah <dave@ds0.me>
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2019-06-14 17:15:02 +01:00 |
Eddie Hung
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2c40b66785
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Rip out all non FPGA stuff from abc9
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2019-06-12 16:53:12 -07:00 |
Eddie Hung
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b3faf0246d
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Be more precise when connecting during ABC9 re-integration
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2019-06-12 16:04:33 -07:00 |
Eddie Hung
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2e7e73f483
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Remove hacky wideports_split from abc9
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2019-06-12 15:52:49 -07:00 |
Eddie Hung
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d9974b85e7
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Fix compile errors when #if 1 for debug
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2019-06-12 15:47:39 -07:00 |
Eddie Hung
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8bb67fa67c
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Do not call abc9 if no outputs
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2019-06-12 10:18:44 -07:00 |
Eddie Hung
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14e870d4c4
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More write_xaiger cleanup
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2019-06-12 10:00:57 -07:00 |
Eddie Hung
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b21d29598a
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Consistency
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2019-06-12 09:40:51 -07:00 |
Eddie Hung
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afd620fd5f
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Typo: wire delay is -W argument
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2019-06-12 09:13:53 -07:00 |
Eddie Hung
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2dffa4685b
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Add "-W' wire delay arg to abc9, use from synth_xilinx
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2019-06-11 17:10:47 -07:00 |
Eddie Hung
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5a46a0b385
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Fine tune aigerparse
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2019-06-07 16:57:32 -07:00 |
Eddie Hung
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295bd8d0bf
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Remove dupe
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2019-06-03 12:32:20 -07:00 |
Eddie Hung
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eb08e71bd1
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Merge branch 'xaig' into xc7mux
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2019-05-31 13:03:03 -07:00 |
Eddie Hung
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a379234f56
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Throw out unused code inherited from abc
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2019-05-31 12:50:11 -07:00 |
Eddie Hung
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4a6b9af227
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Fix spelling
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2019-05-30 15:50:47 -07:00 |
Eddie Hung
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a44fe3a632
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Revert "Re-enable &dc2"
This reverts commit 8c58c728a7 .
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2019-05-30 11:41:50 -07:00 |
Eddie Hung
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0800846e73
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Do not double count LUT1s
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2019-05-30 11:32:14 -07:00 |
Eddie Hung
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8c58c728a7
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Re-enable &dc2
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2019-05-30 00:42:41 -07:00 |
Eddie Hung
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2560f92f29
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Reduce -W to 160
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2019-05-29 23:01:46 -07:00 |
Eddie Hung
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854557814e
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Erase all boxes before stitching
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2019-05-29 19:17:36 -07:00 |
Eddie Hung
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b955344ecd
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Call &if with -W 250
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2019-05-29 16:34:52 -07:00 |
Eddie Hung
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ecaa7856e9
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Add some debug to abc9
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2019-05-29 15:21:41 -07:00 |
Eddie Hung
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4a76b425cc
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Misspell
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2019-05-28 08:44:59 -07:00 |
Eddie Hung
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89bd6b8504
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If driver not found, use LUT2
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2019-05-27 23:12:21 -07:00 |
Eddie Hung
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4df37c77fd
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Disconnect all ABC boxes too
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2019-05-27 19:40:27 -07:00 |
Eddie Hung
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75bd41eaeb
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Parse without wideports
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2019-05-27 12:22:05 -07:00 |
Eddie Hung
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bf3b8d5e45
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Remove mapped_mod when done
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2019-05-27 12:19:21 -07:00 |
Eddie Hung
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234156c01a
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Instantiate cell type (from sym file) otherwise 'clean' warnings
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2019-05-27 12:16:10 -07:00 |
Eddie Hung
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03b289a851
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Add 'cinput' and 'coutput' to symbols file for boxes
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2019-05-27 11:38:52 -07:00 |
Eddie Hung
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3981eba999
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ABC9 to call &sweep
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2019-05-26 11:31:35 -07:00 |
Eddie Hung
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086b6560b4
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Typo
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2019-05-26 03:17:20 -07:00 |
Eddie Hung
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823153e418
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Combine ABC_COMMAND_LUT
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2019-05-26 02:47:06 -07:00 |
Eddie Hung
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32a4c10c0d
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Fix "a" extension
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2019-05-26 02:44:36 -07:00 |
Eddie Hung
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6ad09bfcea
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Add &fraig and &mfs back
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2019-05-24 15:10:18 -07:00 |
Eddie Hung
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d9c915042a
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Move clean from aigerparse to abc9
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2019-04-23 13:42:35 -07:00 |
Eddie Hung
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5f30a8795d
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Tidy up
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2019-04-22 17:47:05 -07:00 |
Eddie Hung
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4cfef7897f
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Merge branch 'xaig' into xc7mux
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2019-04-22 11:58:59 -07:00 |
Eddie Hung
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a20ed260e1
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Skip if abc_box_id earlier
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2019-04-17 16:36:03 -07:00 |
Eddie Hung
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abcd3103ff
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Do not print slack histogram
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2019-04-17 15:11:14 -07:00 |
Eddie Hung
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fd89c1056e
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Working ABC9 script
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2019-04-17 12:33:32 -07:00 |
Eddie Hung
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ae2653c50f
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abc9 to output some more info
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2019-04-16 16:39:16 -07:00 |
Eddie Hung
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55a3638c71
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Port from xc7mux branch
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2019-04-16 15:01:45 -07:00 |
Eddie Hung
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fc5fda595d
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Merge branch 'xaig' into xc7mux
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2019-04-16 13:15:53 -07:00 |
Eddie Hung
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afcb86c3d1
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abc9 to call "setundef -zero" behaving as for abc
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2019-04-16 13:10:13 -07:00 |