Eddie Hung
9fef1df3c1
Panic over. Model was elsewhere. Re-arrange for consistency
2019-10-04 10:48:44 -07:00
Eddie Hung
b3d8a60cbd
Re-order
2019-09-27 14:32:07 -07:00
Eddie Hung
781dda6175
select once
2019-09-26 10:15:05 -07:00
Eddie Hung
27e5bf5aad
Stop trying to be too smart by prematurely optimising
2019-09-26 09:57:11 -07:00
Eddie Hung
63940913d2
Only wreduce on t:$add
2019-09-25 17:22:04 -07:00
Eddie Hung
289cf688b7
Re-add DSP_A_MINWIDTH, remove unnec. opt_expr -fine from synth_ice40
2019-09-20 09:02:29 -07:00
Eddie Hung
829e4f5d2c
Revert "Move mul2dsp before wreduce"
...
This reverts commit e4f4f6a9d5
.
2019-09-20 08:56:16 -07:00
Eddie Hung
e4f4f6a9d5
Move mul2dsp before wreduce
2019-09-20 08:41:40 -07:00
Eddie Hung
3b9b0fcd06
Tidy up synth_ice40, only restrict DSP_B_MINWIDTH=2
2019-09-19 14:57:38 -07:00
Eddie Hung
e742478e1d
Merge remote-tracking branch 'origin/master' into xc7dsp
2019-09-05 13:01:27 -07:00
Eddie Hung
4bda902f1b
LX -> LP
2019-08-28 19:02:54 -07:00
Eddie Hung
e4f89e01b5
Specify ice40 family to cells_sim.v using define
2019-08-28 17:21:12 -07:00
Eddie Hung
b7a48e3e0f
Merge remote-tracking branch 'origin/master' into xc7dsp
2019-08-20 20:18:17 -07:00
Eddie Hung
12c692f6ed
Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder"
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This reverts commit c851dc1310
, reversing
changes made to f54bf1631f
.
2019-08-12 12:06:45 -07:00
Eddie Hung
f890cfb63b
Merge remote-tracking branch 'origin/master' into xc7dsp
2019-08-12 11:32:10 -07:00
David Shah
f9020ce2b3
Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"
2019-08-10 17:14:48 +01:00
Clifford Wolf
f54bf1631f
Merge pull request #1258 from YosysHQ/eddie/cleanup
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Cleanup a few barnacles across codebase
2019-08-10 09:52:14 +02:00
Eddie Hung
6d254f2de8
Add wreduce to synth_ice40 -dsp as well
2019-08-09 17:05:56 -07:00
Eddie Hung
2c0be7aa5d
Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing
2019-08-08 12:56:05 -07:00
Eddie Hung
675c1d4218
Add ice40_wrapcarry pass, rename $__ICE40_FULL_ADDER -> CARRY_WRAPPER
2019-08-07 16:29:38 -07:00
Eddie Hung
6b314c8371
Wrap SB_CARRY+SB_LUT into $__ICE40_FULL_ADDER
2019-08-07 16:29:38 -07:00
Eddie Hung
a206aed977
Run "opt_expr -fine" instead of "wreduce" due to #1213
2019-08-07 13:59:07 -07:00
Eddie Hung
48d0f99406
stoi -> atoi
2019-08-07 11:09:17 -07:00
Eddie Hung
915f4e34bf
DSP_MINWIDTH -> DSP_{A,B,Y}_MINWIDTH
2019-08-01 13:20:34 -07:00
Eddie Hung
cb505c50d3
Remove debug
2019-07-22 16:14:15 -07:00
Eddie Hung
4d71ab384d
Rename according to vendor doc TN1295
2019-07-22 15:08:26 -07:00
Eddie Hung
5e70b8a22b
opt and wreduce necessary for -dsp
2019-07-22 13:48:33 -07:00
Eddie Hung
47fd042b9f
Indirection via $__soft_mul
2019-07-19 20:20:33 -07:00
Eddie Hung
3dc3c749d5
Add DSP_MINWIDTH=11 for ice40 since ice40_dsp uses this threshold
2019-07-19 11:41:00 -07:00
Eddie Hung
42e40dbd0a
Merge remote-tracking branch 'origin/master' into ice40dsp
2019-07-18 15:45:25 -07:00
Eddie Hung
266c1ae122
synth_ice40 to decompose into 16x16
2019-07-18 15:38:09 -07:00
Clifford Wolf
e66e8fb59d
Merge pull request #1184 from whitequark/synth-better-labels
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synth_{ice40,ecp5}: more sensible pass label naming
2019-07-18 15:34:28 +02:00
Sylvain Munaut
f28e38de99
ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map
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The new mapping introduced in 437fec0d88
needed matching adaptation when converting and optimizing LUTs during
the relut process
Fixes #1187
(Diagnosis of the issue by @daveshah1 on IRC)
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-07-16 23:57:15 +02:00
whitequark
ba099bfe9b
synth_{ice40,ecp5}: more sensible pass label naming.
2019-07-16 20:41:51 +00:00
Eddie Hung
ba8ccbdea8
Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix
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abc9/ice40: encapsulate SB_CARRY+SB_LUT4 into one box
2019-07-16 08:52:14 -07:00
Eddie Hung
62ac5ebd02
Map to and from this box if -abc9
2019-07-12 00:53:01 -07:00
whitequark
b700a4b1c5
synth_ice40: switch -relut to be always on.
2019-07-11 20:18:41 +00:00
whitequark
a8c5f7f41e
synth_ice40: fix help text typo. NFC.
2019-07-11 20:18:41 +00:00
Eddie Hung
6bbd286e03
Error out if -abc9 and -retime specified
2019-07-10 12:47:48 -07:00
Eddie Hung
03705f69f4
Update synth_ice40 -device doc to be relevant for -abc9 only
2019-06-28 09:49:01 -07:00
Eddie Hung
af8a5ae5fe
Extraneous newline
2019-06-27 16:12:20 -07:00
David Shah
0dd850e655
abc9: Add wire delays to synth_ice40
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Signed-off-by: David Shah <dave@ds0.me>
2019-06-26 11:39:44 +01:00
Eddie Hung
97d2656375
Resolve comments from @daveshah1
2019-06-14 12:00:02 -07:00
Eddie Hung
627a62a797
Make doc consistent
2019-06-14 10:32:46 -07:00
Eddie Hung
9f44a71715
Consistent with xilinx
2019-06-03 09:23:43 -07:00
Eddie Hung
8829cba901
Merge remote-tracking branch 'origin/clifford/pmgenstuff' into xc7mux
2019-05-02 11:25:34 -07:00
Eddie Hung
5cd19b52da
Merge remote-tracking branch 'origin/master' into xc7mux
2019-05-02 10:44:59 -07:00
Clifford Wolf
d2d402e625
Run "peepopt" in generic "synth" pass and "synth_ice40"
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-30 08:10:37 +02:00
Eddie Hung
1ea6d7920f
Cleanup ice40
2019-04-26 14:31:59 -07:00
Eddie Hung
d7f0700bae
Convert to use #945
2019-04-21 15:19:02 -07:00