Commit Graph

126 Commits

Author SHA1 Message Date
Emil J. Tywoniak 9510293a94 fixup 2024-04-04 18:16:58 +02:00
Emil J. Tywoniak a580a7c82c docs: Document $macc 2024-04-03 20:37:54 +02:00
Rui Chen b57a803f60
chore: fix master branch refs
Signed-off-by: Rui Chen <rui@chenrui.dev>
2024-03-24 00:41:54 -04:00
Krystine Sherwin c6795cefc5
docs: Install python requirements 2024-03-19 06:05:03 +13:00
Krystine Sherwin f72ddfb09d docs: Fix repo file links 2024-03-19 05:57:26 +13:00
Krystine Sherwin 29c8a3bef9 docs: Fix splice.v in verific 2024-03-19 05:57:26 +13:00
Krystine Sherwin 49f1bea1d2
docs: Add synth_ice40 to macro checks 2024-03-18 11:01:09 +13:00
Krystine Sherwin b6ffdec2ce
docs: Update OSS CAD suite info 2024-03-18 10:45:31 +13:00
Krystine Sherwin 2832034877
docs: Clarify install instructions
`config-clang` is the default, and doesn't need to be run first.  Previous instructions were ambiguous about that point.
Add note on using a different `CXX`.
2024-03-18 10:35:01 +13:00
Krystine Sherwin bc9cccacf2
docs: Move fifo localparams into module def
Fix for failing CI.
2024-03-18 10:02:40 +13:00
Krystine Sherwin 3635f911dc
Docs: Updates from @povik comments 2024-03-05 05:57:27 +13:00
Krystine Sherwin 1455941ab9
Merge branch 'master' into krys/docs 2024-03-05 05:48:46 +13:00
Krystine Sherwin 3596025283
docs: Remove TODOs from output
Remove highlighting of wreduce/opt_clean bug.
2024-03-05 05:44:40 +13:00
passingglance 5226d07721
Update CHAPTER_CellLib.rst
Fix parameter name to \WIDTH for $tribuf cell.
2024-02-11 23:59:07 -08:00
passingglance 2b89a5cced
Update CHAPTER_Basics.rst
Fix typo in Fig. 2.2 caption.
2024-02-10 10:52:20 -08:00
Krystine Sherwin 9eed04dd4b
Docs: Note on debug for memory_libmap 2024-02-05 15:38:01 +13:00
Catherine c7bf0e3b8f Add new `$check` cell to represent assertions with a message. 2024-02-01 20:10:39 +01:00
Krystine Sherwin fae35fe98b
Docs: example_synth fifo update
More detail on `memory_libmap`, the `$__ICE40_RAM4K_` intermediate step, and the
bizarre opt output.
2024-01-30 13:34:29 +13:00
Krystine Sherwin fd0c574942
Docs: changes/todos from JF 2024-01-30 13:33:07 +13:00
Krystine Sherwin 9878e69d6c
Docs: tidying
- Use `:file:` role for file names, as well as `:makevar:` and `:program:`.
- Remove deprecated `linux-arm` and `linux-riscv64` oss-cad-suite targets.
- Add link to ABC.
- More (and better) links to code examples.  Formatted `:file:` text with link
  to source on github.
- Includes a few extra todos (mostly picking up inline code blocks and a couple
  intro reminders).
- Fixing a few missing `:yoscrypt:` and `:cmd:ref:` tags.
- Reflowing some paragraphs for spacing/width.
2024-01-30 13:31:00 +13:00
Krystine Sherwin 22808e0e3f
Docs: work on selections.rst
Highlighting the difference between `select prod %ci` and `select prod %ci2` by
introducing `sumproud.out` using the `dump` command.

Playing around with advanced cone example code.
2024-01-26 17:29:59 +13:00
Krystine Sherwin e2e7065590
Docs: some restructure of advanced section
- Filling out index descriptions for `using_yosys` and `using_yosys/synthesis`.
- To discourage skipping over these index pages, the toctree in
  `using_yosys/index` is hidden and instead has inline links to the two
  subsections.
- Tidying todos.
- Moves technology mapping to `techmap_synth`, leaving the techmap by example in
  the internals section. `yosys_flows` gets split up, with the coarse-grain
  intro replaced by `synthesis/index`, the extract pass moving to
  `synthesis/extract` and model checking to `more_scripting/model_checking`.
2024-01-26 13:08:22 +13:00
Krystine Sherwin 4582ab59da
Docs: intro to memory_libmap 2024-01-26 11:15:01 +13:00
Krystine Sherwin 6e38848b92
Docs: updating makefiles 2024-01-25 12:35:03 +13:00
Krystine Sherwin 2a14c72110
test-docs: target examples directly 2024-01-25 11:36:59 +13:00
Krystine Sherwin 57a7532227
Docs: add test-examples target
`test` becomes `test-macros`, with a new `test` calling both `test-*` targets.
2024-01-25 10:15:00 +13:00
Krystine Sherwin 9b820108d6
Docs: add test-docs.yml 2024-01-24 11:22:38 +13:00
Krystine Sherwin 449135a9d4
Docs: adding other macro command lists
Also updates `macro_commands.py` to skip empty lines, and moves comment
stripping earlier in parsing.
2024-01-24 10:29:40 +13:00
Krystine Sherwin 6c8949cacc
Docs: static opt macro list
Also adds `docs/tests/macro_commands.py` which checks all commands in
`code_examples/macro_commands` against the current yosys build. Format similar
to `run-test.sh` files: logging the file under test and reporting errors.
2024-01-24 09:56:00 +13:00
Krystine Sherwin 95849edbba
Docs: changes from JF
`yosys-witness` prereq `click`.
Yosys environment vars & `yosys --help` output.
Removing Ubuntu/macOS version numbers/names.
Hide `troubleshooting` page.
2024-01-23 17:35:06 +13:00
Krystine Sherwin 9ec1536f1f
Docs: getting_started tidy
Rename `show` intro and point to `/cmd/show`.
Add getting_started section overview.
2024-01-22 11:44:43 +13:00
Krystine Sherwin 65bb0d3059
Docs: updating to current 'master'
Pulling for #4133 and removing related TODO.
2024-01-22 11:18:07 +13:00
Krystine Sherwin 794ad381c6
Docs: scripting_intro/show_intro
Adds two new `show` commands to `fifo.ys` for demo purposes.
Mention referencing named selections with `@<name>`.
Also adds a note to `example_synth` to point to the show intro.
2024-01-22 11:10:02 +13:00
Krystine Sherwin 14b7c581fa
Docs: reworking scripting_intro
Now comes *after* example_synth, with references back to it.
Includes some minor adjustment to the `fifo.ys` script to better demonstrate the `select` command.
Still needs an updated section on `show`.

Also includes some other minor updates.
2024-01-18 15:33:59 +13:00
Krystine Sherwin 74d2c918cd
Docs: installation/source tree 2024-01-18 14:05:34 +13:00
Krystine Sherwin 93ceda5c63
Docs: auxlibs 2024-01-18 12:14:00 +13:00
Krystine Sherwin 27ae093dba
Docs: working on opt page
Replace leftover `opt` example source/images with examples specific to the `opt_*` pass.
Currently has images for `opt_expr`, `opt_merge`, `opt_muxtree`, and `opt_share`.
Also includes some other TODO updates.
2024-01-17 11:00:42 +13:00
Krystine Sherwin 63a0f80996
Docs: opt_share 2024-01-17 08:47:50 +13:00
Krystine Sherwin 14f2208e47
Docs: opt_expr 2024-01-17 08:40:48 +13:00
Krystine Sherwin aa652f9634
Docs: fix scripting_intro.rst images 2024-01-16 13:23:30 +13:00
Krystine Sherwin 5a4c2e5c79
example_synth: proc and opt_expr
Highlight `proc` blocks and intro `opt_expr`.
2024-01-16 13:23:04 +13:00
Krystine Sherwin 646ff6d32d
Docs: interactive investigation
More `literalinclude` and references to source.
Adding `example_show.ys` and `example_lscd.ys`.
Rename `example_00` et al to `example_first` et al.
Also some other minor tidying.
2024-01-15 15:32:14 +13:00
Krystine Sherwin 9fe3dcda78
Docs: optimization passes
Working on `opt.rst`.
Replace the hardcoded `opt` psuedo code listing with a `literalinclude` from `/cmd/opt.rst`.
Reorder and update `opt_*` list to match current `opt`.
Expand sub-section titles with the function of the pass (keeping the `:cmd:ref:` part at the end to prevent the Esbonio error in vscode when a heading starts with a directive).
Move comments about `clean` and `;;` being aliases into final `opt` subsection.

Also renames `Test suites` -> `Testing Yosys`.
2024-01-15 13:15:11 +13:00
Krystine Sherwin 9eab5d8b24
Updated Yosys family 2024-01-15 12:27:38 +13:00
Krystine Sherwin 3360c612d5
Docs: remove hanging reference 2024-01-13 17:46:19 +13:00
Krystine Sherwin 12fa443fe3
example_synth: more on hierarchy and stat 2024-01-13 17:46:04 +13:00
Krystine Sherwin a3255fd8d3
Docs: opt_rmunused -> opt_clean 2024-01-13 16:57:10 +13:00
Krystine Sherwin 064723a1cc
example_synth: tidying
Adds note on `+/`.
Clarifies that we can't entirely skip loading `cells_sim.v`, and then mentions it again later once we need it.
More on final steps (and synthesis outputs).
2024-01-13 15:46:00 +13:00
Catherine 1159e48721 write_verilog: emit `initial $display` correctly. 2024-01-11 13:13:04 +01:00
Krystine Sherwin eb5da87d52
example_synth: hardware mapping
Filling out the hardware mapping sections, and actually highlighting the changes in schematics instead of just the memory block.
Also includes Part 4 of the coarse-grain rep, looking at `memory_collect` and putting the `synth_ice40 -top fifo -run :map_ram` command in its own (sub)section.
Includes a `no_rw_check` section label in `memory.rst` for reference (because I can't remember how to reference by heading).

Not sure about the opt output after map_ram section which has an open TODO, and the final steps section is also still open.
2024-01-08 16:59:03 +13:00