riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
5,443 Commits 81 Branches 48 Tags 63 MiB
Commit Graph

5443 Commits

Author SHA1 Message Date
Eddie Hung 086b6560b4 Typo 2019-05-26 03:17:20 -07:00
Eddie Hung 66701c5fcc Muck about with LUT delays some more 2019-05-26 02:52:48 -07:00
Eddie Hung 823153e418 Combine ABC_COMMAND_LUT 2019-05-26 02:47:06 -07:00
Eddie Hung 32a4c10c0d Fix "a" extension 2019-05-26 02:44:36 -07:00
Clifford Wolf 2058c7c53b
Merge pull request #1035 from YosysHQ/eddie/opt_rmdff 
opt_rmdff to work on $dffe and $_DFFE_*
 2019-05-26 11:44:31 +02:00
Clifford Wolf ba92721613
Merge pull request #1042 from mmicko/git_ignore_python 
Add files to ignore for python build
 2019-05-26 10:40:40 +02:00
Miodrag Milanovic ece551eaff Add files to ignore for python build 2019-05-26 09:31:43 +02:00
Eddie Hung 01684643b6 Fix "write_xaiger", and to write each box contents into holes 2019-05-25 22:34:50 -07:00
Eddie Hung 73c98f2ae2 Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-25 20:50:47 -07:00
Eddie Hung d4fb6cac7c Revert enable check 2019-05-25 12:55:57 -07:00
Clifford Wolf a90eec12c9
Merge pull request #1041 from YosysHQ/clifford/fix1040 
Fix handling of offset and upto module ports in write_blif
 2019-05-25 19:17:05 +02:00
Clifford Wolf 6352df42ae Fix handling of offset and upto module ports in write_blif, fixes #1040 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-25 17:45:14 +02:00
Eddie Hung ca5774ed40 Try new LUT delays 2019-05-24 20:39:55 -07:00
Eddie Hung f3e86e06e6 Fix init 2019-05-24 18:43:26 -07:00
Eddie Hung e1cb1bb948 Fix typos 2019-05-24 18:34:27 -07:00
Eddie Hung d15da4bc11 Add more tests 2019-05-24 18:33:18 -07:00
Eddie Hung 4bd9465ed3 Call proc 2019-05-24 18:32:02 -07:00
Eddie Hung 822d0b7789 opt_rmdff to optimise even in presence of enable signal, even removing 2019-05-24 18:30:51 -07:00
Eddie Hung f0c6b73b72 Fix duplicate driver 2019-05-24 17:44:57 -07:00
Eddie Hung 0d66103cbb Add comments 2019-05-24 16:33:10 -07:00
Eddie Hung 357b1de6bc Resolve @cliffordwolf review, set even if !has_init 2019-05-24 16:15:22 -07:00
Eddie Hung 6ad09bfcea Add &fraig and &mfs back 2019-05-24 15:10:18 -07:00
Eddie Hung 60af2ca94d Transpose CARRY4 delays 2019-05-24 14:09:15 -07:00
Clifford Wolf b7dd7c2dcd Add proper error message for btor recursion_guard 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-24 16:22:34 +02:00
Eddie Hung 52e9036d39 Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-23 13:38:04 -07:00
Eddie Hung 68359bcd6f Merge remote-tracking branch 'origin/eddie/opt_rmdff' into xc7mux 2019-05-23 13:37:53 -07:00
Eddie Hung 67a4850e35
Merge pull request #1036 from YosysHQ/eddie/xilinx_dram 
Add "min bits" and "min wports" to xilinx dram rules
 2019-05-23 13:13:10 -07:00
Eddie Hung 5ac7e38d0a Fix spacing 2019-05-23 12:58:30 -07:00
Eddie Hung 99a3fee8f4 Add "min bits" and "min wports" to xilinx dram rules 2019-05-23 11:32:28 -07:00
Eddie Hung 47f9ea142f Add opt_rmdff tests 2019-05-23 11:26:38 -07:00
Eddie Hung 50ed34a6d0 opt_rmdff to work on $dffe and $_DFFE_* 2019-05-23 11:26:18 -07:00
Eddie Hung ae89e6ab26 Add whitebox support to DRAM 2019-05-23 08:58:57 -07:00
Stefan Biereigel 85de9d26c1 fix assignment of non-wires 2019-05-23 17:55:56 +02:00
Stefan Biereigel c2caf85f7c add simple test case for wand/wor 2019-05-23 13:57:27 +02:00
Stefan Biereigel fd003e0e97 fix indentation across files 2019-05-23 13:57:27 +02:00
Stefan Biereigel 075a48d3fa implementation for assignments working 2019-05-23 13:57:27 +02:00
Stefan Biereigel 9df04d7e75 make lexer/parser aware of wand/wor net types 2019-05-23 13:57:27 +02:00
Clifford Wolf ca46947354
Merge pull request #1031 from mdaiter/optimizeLookupTableBtor 
Optimize numberOfPermutations
 2019-05-23 13:52:48 +02:00
Matthew Daiter f0ff31ceea Optimize numberOfPermutations 2019-05-22 17:29:50 -04:00
Kaj Tuomi 29b898cf76 OS X related fixes. 2019-05-22 22:58:12 +03:00
Clifford Wolf e3f9ccf56d Keep zero-width wires in opt_clean if and only if they are ports, fixes #1023 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-22 13:57:36 +02:00
Clifford Wolf 0971f772d7 Fix handling of warning and error messages within log_make_debug-blocks 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-22 13:46:38 +02:00
Clifford Wolf 5c164d0863
Merge pull request #1019 from YosysHQ/clifford/fix1016 
Add "wreduce -keepdc"
 2019-05-22 13:29:04 +02:00
Clifford Wolf 84d91420e4
Merge pull request #1021 from ucb-bar/fixfirrtl_shr,neg 
Fix static shift operands, neg result type, minor formatting
 2019-05-22 12:01:19 +02:00
Eddie Hung 4f44e3399b shift register inference before mux 2019-05-22 02:36:28 -07:00
Eddie Hung 9b1078b9bd Fix/workaround symptom unveiled by #1023 2019-05-21 18:50:02 -07:00
Eddie Hung cb24d23b6d
Merge pull request #1024 from YosysHQ/eddie/fix_Wmissing_braces 2019-05-21 18:20:58 -07:00
Eddie Hung 7057753427 Rename label 2019-05-21 18:20:31 -07:00
Eddie Hung b5a29460b9 Try again 2019-05-21 17:20:19 -07:00
Eddie Hung 1bff09f2ff Fix warning 2019-05-21 16:26:20 -07:00