Clifford Wolf
6352df42ae
Fix handling of offset and upto module ports in write_blif, fixes #1040
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-25 17:45:14 +02:00
Clifford Wolf
f4abc21d8a
Add "whitebox" attribute, add "read_verilog -wb"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-18 17:45:47 +02:00
Henner Zeller
3aa4484a3c
Consistent use of 'override' for virtual methods in derived classes.
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o Not all derived methods were marked 'override', but it is a great
feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
use the plain keyword going forward now that C++11 is established)
2018-07-20 23:51:06 -07:00
Clifford Wolf
5ca91ca019
Add "write_blif -inames -iattr"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-15 14:07:21 +02:00
Clifford Wolf
05cdd58c8d
Add $_ANDNOT_ and $_ORNOT_ gates
2017-05-17 09:08:29 +02:00
Clifford Wolf
5c2c78e2dd
Added wire start_offset and upto handling BLIF back-end
2016-11-23 13:54:33 +01:00
Clifford Wolf
9e980a2bb0
Use init value "2" for all uninitialized FFs in BLIF back-end
2016-10-18 10:54:04 +02:00
Clifford Wolf
8ebba8a35f
Added $ff and $_FF_ cell types
2016-10-12 01:18:39 +02:00
Clifford Wolf
27b5347a87
Restored blif "-true - .." behavior, use "-true + .." for eddiehung-vtr behavior
2016-07-08 11:51:04 +02:00
Clifford Wolf
72149aba2e
In BLIF, a .names without entries already always outputs 0
2016-07-08 11:41:26 +02:00
Clifford Wolf
f6b7cf23d6
Merge branch 'yosys-0.5-vtr' of https://github.com/eddiehung/yosys into eddiehung-vtr
2016-07-08 11:32:36 +02:00
Clifford Wolf
5ffad4e073
Added $sop support to BLIF back-end
2016-06-18 12:28:49 +02:00
Clifford Wolf
d10dfccabb
Added "write_blif -noalias"
2016-05-06 15:05:53 +02:00
Clifford Wolf
60ac1bd178
Added support for "active high" and "active low" latches in BLIF back-end
2016-04-22 18:00:46 +02:00
Clifford Wolf
0bc95f1e04
Added "yosys -D" feature
2016-04-21 23:28:37 +02:00
Clifford Wolf
3920bf58d0
Fixed some typos
2016-04-05 08:18:21 +02:00
Clifford Wolf
4393a8ffbf
Added "write_blif -cname" mode
2016-01-06 14:32:28 +01:00
Clifford Wolf
eac0bcd7d3
Improvements in BLIF back-end
2015-07-29 17:06:19 +02:00
Clifford Wolf
6c84341f22
Fixed trailing whitespaces
2015-07-02 11:14:30 +02:00
Clifford Wolf
4c733301e6
Fixed cstr_buf for std::string with small string optimization
2015-06-11 13:39:49 +02:00
Clifford Wolf
08a4af3cde
Improvements in BLIF front-end
2015-05-24 08:03:21 +02:00
eddiehung
7c62318239
Fix for all zero mask
2015-05-03 12:53:09 +01:00
eddiehung
079c1205fe
Escape '<' and '>' some more
2015-05-03 10:37:20 +01:00
eddiehung
872e13321c
For vtr, escape angle brackets as well
2015-04-28 08:56:00 +01:00
eddiehung
058deb777e
blifwriter: write out .names for true/false/undef type == '-'
2015-04-28 08:55:26 +01:00
Clifford Wolf
795a6e1d04
Added write_blif -attr
2015-03-02 23:47:45 +01:00
Clifford Wolf
30de490d86
Fixed another bug in write_blif handling of $lut cells
2014-12-19 17:54:44 +01:00
Clifford Wolf
b95051fb70
Fixed writing of $lut cells in BLIF backend
2014-12-17 11:13:57 +01:00
Clifford Wolf
e01254d824
Added "write_blif -undef" and support for special "-" true/false/undef type
2014-12-14 18:00:38 +01:00
Clifford Wolf
59d11978fc
Added "write_blif -blackbox"
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based on code by Eddie Hung from
https://github.com/eddiehung/yosys/commit/1e481661cb4a4
2014-12-14 17:45:03 +01:00
Clifford Wolf
32dce4a870
Added "blif -unbuf" feature
2014-12-14 17:37:46 +01:00
Clifford Wolf
f9a307a50b
namespace Yosys
2014-09-27 16:17:53 +02:00
Ruben Undheim
79cbf9067c
Corrected spelling mistakes found by lintian
2014-09-06 08:47:06 +02:00
Clifford Wolf
5dce303a2a
Changed backend-api from FILE to std::ostream
2014-08-23 13:54:21 +02:00
Clifford Wolf
b64b38eea2
Renamed $lut ports to follow A-Y naming scheme
2014-08-15 14:18:40 +02:00
Clifford Wolf
f092b50148
Renamed $_INV_ cell type to $_NOT_
2014-08-15 14:11:40 +02:00
Clifford Wolf
04727c7e0f
No implicit conversion from IdString to anything else
2014-08-02 18:58:40 +02:00
Clifford Wolf
b9bd22b8c8
More cleanups related to RTLIL::IdString usage
2014-08-02 13:19:57 +02:00
Clifford Wolf
cdae8abe16
Renamed port access function on RTLIL::Cell, added param access functions
2014-07-31 16:38:54 +02:00
Clifford Wolf
7bd2d1064f
Using log_assert() instead of assert()
2014-07-28 11:27:48 +02:00
Clifford Wolf
10e5791c5e
Refactoring: Renamed RTLIL::Design::modules to modules_
2014-07-27 11:18:30 +02:00
Clifford Wolf
4c4b602156
Refactoring: Renamed RTLIL::Module::cells to cells_
2014-07-27 01:51:45 +02:00
Clifford Wolf
f9946232ad
Refactoring: Renamed RTLIL::Module::wires to wires_
2014-07-27 01:49:51 +02:00
Clifford Wolf
b7dda72302
Changed users of cell->connections_ to the new API (sed command)
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git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
2014-07-26 15:58:23 +02:00
Clifford Wolf
cc4f10883b
Renamed RTLIL::{Module,Cell}::connections to connections_
2014-07-26 11:58:03 +02:00
Clifford Wolf
6aa792c864
Replaced more old SigChunk programming patterns
2014-07-24 23:10:58 +02:00
Clifford Wolf
c094c53de8
Removed RTLIL::SigSpec::optimize()
2014-07-23 20:32:28 +02:00
Clifford Wolf
ec923652e2
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
2014-07-23 09:52:55 +02:00
Clifford Wolf
a8d3a68971
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
2014-07-23 09:49:43 +02:00
Clifford Wolf
4b4048bc5f
SigSpec refactoring: using the accessor functions everywhere
2014-07-22 20:39:37 +02:00