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5,912 Commits 90 Branches 51 Tags 36 MiB
Commit Graph

12 Commits

Author SHA1 Message Date
Eddie Hung 3825068a75 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-24 23:04:25 -07:00
Eddie Hung 2f770b7400 Use LUT delays for dist RAM delays 2019-06-24 23:02:53 -07:00
Eddie Hung e1ba25d79f Add RAM32X1D box info 2019-06-24 22:54:35 -07:00
Eddie Hung 1564eb8b54 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-24 22:48:49 -07:00
Eddie Hung 152e682bd5 Add Xilinx dist RAM as comb boxes 2019-06-24 21:54:01 -07:00
Eddie Hung d54dceb547 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-22 19:44:17 -07:00
Eddie Hung 792d0670c3 Add comment to xc7 box 2019-06-22 14:28:24 -07:00
Eddie Hung 7903ebe3e0 Carry in/out box ordering now move to end, not swap with end 2019-06-22 14:18:42 -07:00
Eddie Hung 65c022c257 Remove DFF and RAMD box info for now 2019-06-21 20:41:14 -07:00
Eddie Hung 9abde12110 Add $__XILINX_MUXF78 to preserve entire box 2019-06-21 15:47:42 -07:00
Eddie Hung 8fa74287a7 As per @daveshah1 remove async DFF timing from xilinx 2019-06-14 12:43:20 -07:00
Eddie Hung d47ff7ba87 Rename +/xilinx/abc.{box,lut} -> abc_xc7.{box,lut} 2019-06-14 10:51:11 -07:00