Commit Graph

7364 Commits

Author SHA1 Message Date
Eddie Hung 36e38ed46a
Merge pull request #1321 from YosysHQ/eddie/xilinx_srl
xilinx_srl pass for shift register extraction
2019-08-30 10:32:03 -07:00
Eddie Hung d2d2816f8c Merge branch 'eddie/xilinx_srl' into xaig_arrival 2019-08-30 10:30:54 -07:00
Eddie Hung f0fef90e9d Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-30 10:30:46 -07:00
Eddie Hung 9c4e1c6a8f
Format `-pwires` 2019-08-30 10:27:07 -07:00
Eddie Hung 295c18bd6b Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp 2019-08-30 09:50:20 -07:00
Eddie Hung 6e475484b2 Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl 2019-08-30 09:37:32 -07:00
SergeyDegtyar 53912ad649 macc test fix 2019-08-30 16:01:36 +03:00
David Shah 6919c0f9b0 Merge branch 'master' into xc7dsp 2019-08-30 13:57:15 +01:00
David Shah a94a8f3e40
Merge pull request #1343 from whitequark/diamond-ffs
Add/update every Diamond FF primitive
2019-08-30 13:28:21 +01:00
David Shah 91b46ed816 ecp5: Add simulation equivalence check for Diamond FF implementations
Signed-off-by: David Shah <dave@ds0.me>
2019-08-30 13:27:36 +01:00
SergeyDegtyar 17c92dc679 Fix macc test 2019-08-30 15:22:46 +03:00
SergeyDegtyar 94a56c14b7 div_mod test fix 2019-08-30 14:17:03 +03:00
SergeyDegtyar f4a48ce8e6 fix div_mod test 2019-08-30 13:22:11 +03:00
whitequark d9c621f9d1 ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives. 2019-08-30 10:05:09 +00:00
whitequark 1e6b60d563 ecp5: allow (and enable by default) GSR on FD/IFS/OFS primitives. 2019-08-30 09:56:19 +00:00
whitequark 6fa8ce93e6 ecp5: add missing FD primitives. 2019-08-30 09:54:48 +00:00
whitequark 7e2825a2a4 ecp5: fix CEMUX on IFS/OFS primitives. 2019-08-30 09:42:33 +00:00
SergeyDegtyar 86f1375ecd Fix test for counter 2019-08-30 12:38:28 +03:00
Sergey f23b540b45
Merge branch 'master' into master 2019-08-30 10:29:47 +03:00
SergeyDegtyar d144748401 Add new tests. 2019-08-30 09:45:33 +03:00
SergeyDegtyar eb0a5b2293 Remove unnecessary common.v(assertions for testbenches). 2019-08-30 09:17:32 +03:00
SergeyDegtyar 8e3abda193 Remove simulation from run-test.sh (unnecessary paths) 2019-08-30 09:11:03 +03:00
SergeyDegtyar 20f4aea480 Remove simulation from run-test.sh 2019-08-30 08:53:35 +03:00
Eddie Hung 694e30a354
Merge pull request #1337 from YosysHQ/eddie/fix_carry_wrapper
Fix $__ICE40_CARRY_WRAPPER, restore abc9 functionality
2019-08-29 22:10:45 -07:00
Eddie Hung 6a111ad324 Nicer formatting 2019-08-29 17:24:48 -07:00
Eddie Hung 5d16bf8316 parse_xaiger() to do "clean -purge" 2019-08-29 17:24:25 -07:00
Eddie Hung 18cabe9370 Output has priority over input when stitching in abc9 2019-08-29 17:24:03 -07:00
Eddie Hung c52db44f9a Group abc_* attribute doc with other attributes 2019-08-29 12:13:52 -07:00
Eddie Hung 3e0f73c3df abc9 to not call "clean" at end of run (often called outside) 2019-08-29 12:12:59 -07:00
Sergey 5dda8f39a6
Merge pull request #2 from YosysHQ/master
Pull from upstream
2019-08-29 21:09:40 +03:00
Sergey d360693040
Merge pull request #3 from YosysHQ/Sergey/tests_ice40
Merge my changes to tests_ice40 branch
2019-08-29 21:07:34 +03:00
Eddie Hung 1467761060 Fix typo that's gone unnoticed for 5 months!?! 2019-08-29 10:33:28 -07:00
Eddie Hung 67587bad7f Add constant expression attribute to test 2019-08-29 09:10:20 -07:00
Eddie Hung 83ffec26cb Remove newline 2019-08-29 09:08:58 -07:00
Eddie Hung 6510297712 Restore non-deferred code, deferred case to ignore non constant attr 2019-08-29 09:02:10 -07:00
Eddie Hung 25b1670a84 Rename boxes too 2019-08-29 07:03:32 -07:00
Clifford Wolf 89695fd3ab Bump YOSYS_VER
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-08-29 12:05:26 +02:00
SergeyDegtyar d588c6898f Add comments for examples from Lattice user guide 2019-08-29 10:49:46 +03:00
Eddie Hung c4e5310823 Use a dummy box file if none specified 2019-08-28 20:58:55 -07:00
Eddie Hung 116c249601 -auto-top should check $abstract (deferred) modules with (* top *) 2019-08-28 19:59:25 -07:00
Eddie Hung 34ae29295d read_verilog -defer should still populate module attributes 2019-08-28 19:59:09 -07:00
Eddie Hung 1fdb3fc98c Add failing test 2019-08-28 19:58:58 -07:00
Eddie Hung e8e3830868 Comment out SB_MAC16 arrival time for now, need to handle all its modes 2019-08-28 19:09:29 -07:00
Eddie Hung 309684af16 Add arrival for SB_MAC16.O 2019-08-28 19:07:28 -07:00
Eddie Hung efa4ee5c0e Add arrival times for U 2019-08-28 19:03:29 -07:00
Eddie Hung 4bda902f1b LX -> LP 2019-08-28 19:02:54 -07:00
Eddie Hung 0f4e9f6bc5 Round not floor 2019-08-28 18:57:34 -07:00
Eddie Hung 927f1e3754 Add LP timings 2019-08-28 18:56:25 -07:00
Eddie Hung e3709e5ee6 LX -> LP 2019-08-28 18:51:14 -07:00
Eddie Hung 5c42455350 Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrival 2019-08-28 18:50:20 -07:00