Clifford Wolf
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f9a307a50b
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namespace Yosys
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2014-09-27 16:17:53 +02:00 |
Clifford Wolf
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674f421b47
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Bugfix in iopadmap
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2014-08-15 14:29:42 +02:00 |
Clifford Wolf
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cdae8abe16
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Renamed port access function on RTLIL::Cell, added param access functions
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2014-07-31 16:38:54 +02:00 |
Clifford Wolf
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10e5791c5e
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Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-27 11:18:30 +02:00 |
Clifford Wolf
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f9946232ad
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Refactoring: Renamed RTLIL::Module::wires to wires_
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2014-07-27 01:49:51 +02:00 |
Clifford Wolf
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d68c993ed2
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Changed more code to the new RTLIL::Wire constructors
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2014-07-26 21:30:38 +02:00 |
Clifford Wolf
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f8fdc47d33
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Manual fixes for new cell connections API
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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b7dda72302
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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cc4f10883b
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Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
Clifford Wolf
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2bec47a404
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Use only module->addCell() and module->remove() to create and delete cells
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2014-07-25 17:56:19 +02:00 |
Clifford Wolf
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ec923652e2
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3
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2014-07-23 09:52:55 +02:00 |
Clifford Wolf
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a8d3a68971
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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3
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2014-07-23 09:49:43 +02:00 |
Clifford Wolf
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b76bf05cda
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Added support for "blackbox" attribute to iopadmap
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2014-07-17 08:59:07 +02:00 |
Clifford Wolf
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623a68f528
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Added iopadmap -bits
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2014-02-15 21:59:26 +01:00 |
Clifford Wolf
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ceb971eab9
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Added support for i/o buffers to iopadmap
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2013-10-26 22:27:40 +02:00 |
Clifford Wolf
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e679a5d046
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Fixed handling of boolean attributes (passes)
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2013-10-24 11:37:54 +02:00 |
Clifford Wolf
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96e7abad48
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Added iopadmap pass
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2013-10-16 16:16:06 +02:00 |