In commit ac988cf we made sure to undefine the CONST/VOID macros left
defined by `tcl.h`, but this in turn makes it an issue to include
additional Tcl headers later on (see issue #4808).
One way out is to avoid a global `tcl.h` include. In the process we drop
support for Tcl-enabled MXE builds, which were likely broken anyway due
to the additional Tcl APIs used from `tclapi.cc`.
Drop the parts that are being dropped.
Move the things that are being moved.
Also move the verilog stuff out of README and into the docs.
GettingStarted is less cut and dry, so hold off on that one.
Avoid error:
```
kernel/mem.cc:1683:7: error: conflicting declaration ‘using addr_t = using addr_t = uint32_t’
1683 | using addr_t = MemContents::addr_t;
| ^~~~~~
In file included from /usr/include/sys/types.h:222,
from /usr/include/pthread.h:11,
from /usr/lib/gcc/x86_64-pc-cygwin/12/include/c++/x86_64-pc-cygwin/bits/gthr-default.h:35,
from /usr/lib/gcc/x86_64-pc-cygwin/12/include/c++/x86_64-pc-cygwin/bits/gthr.h:148,
from /usr/lib/gcc/x86_64-pc-cygwin/12/include/c++/ext/atomicity.h:35,
from /usr/lib/gcc/x86_64-pc-cygwin/12/include/c++/bits/cow_string.h:37,
from /usr/lib/gcc/x86_64-pc-cygwin/12/include/c++/bits/basic_string.h:51,
from /usr/lib/gcc/x86_64-pc-cygwin/12/include/c++/string:53,
from ./kernel/yosys_common.h:27,
from ./kernel/yosys.h:42,
from ./kernel/mem.h:23,
from kernel/mem.cc:20:
/usr/include/machine/types.h:63:15: note: previous declaration as ‘typedef char* addr_t’
63 | typedef char *addr_t;
```
According to IntelliSense, only the return types need to be prefixed with `MemContents::`, the rest are automagically using the class definition and highlight as `using Yosys::MemContents::addr_t = uint32_t`.
`Const::size()` returns int, so change iterators that use it to `auto` instead of `size_t`.
For cases where size is being explicitly cast to `int`, use the wrapper that we already have instead: `Yosys::GetSize()`.
There's a mismatch between what `kernel/mem.cc` emits for memories
with no read ports and what the internal RTLIL check expects.
The point of dispute it whether some of the parameters relating to read
ports have a zero-width value in this case. The `mem.cc` code says no,
the internal checker says yes.
Surveying the other `$mem_v2` parameters, and internal cell parameters
in general, I am inclined to side with the `mem.cc` code.
This breaks RTLIL compatibility but for an obscure edge case.
Initialize "unsigned int inner" in hash() functions
Includes a log_assert() that might help catch corrupted data structures
or future incomplete modification of DriveType definition
Remove `/source/cell` from .gitignore.
Add a few initial cell pages.
Add YosysCellGroup documenter and cell:group directive.
Update Documenters to use nested json.
Better nested tocs for group.module.source layout.
New `help -dump-cells-json <file>` to dump cells list.
Add 'group' field to SimHelper class/struct with defaults to gate_other and word_other depending on source (simcells or simlib).
Add 'unary' group to unary operator cells for testing (based on internal cell library docs page).
- Drop `cell_code` and instead map code lookups to the `cell_help` dict.
- Add helper functions to struct for checking and getting the right cell.
- Add `CellType` for cell to `write_cell_rst` function declaration in
preparation for use in future.
- Iterate over `yosys_celltypes.cell_types` when exporting cell rst files,
reporting errors for any cells defined in `cell_types` but not
`cell_help_messages`.