Commit Graph

2548 Commits

Author SHA1 Message Date
Jean-Paul Chaput c737d5bd0c Port to Python3 capacitors & resistors generators.
Main list of ports:

* Replace deprecated operator '<>' by '!='.
* To check if a list is empty, do not compare to [], but check it's
  length instead.
* Do not make a class inherit indirectly twice from the same base class.
* Hurricane physical object constructors uses DbU::Unit as arguments,
  seen as int in Python, so they will not match float. Unfortunately
  the calculation often gives float. So explicitely cast them into
  int. This is due to a change of behavior in Python. Now, 3/2
  gives 1.5 (float). To get the previous one use: 3/2 -> 1 (int).
* dict.keys()[0] no longer work, instead use list(dict.keys())[0].
2022-07-13 11:20:55 +02:00
Jean-Paul Chaput f453dbc6f9 Correct the selection bug in Net mode in CellWidget.
In SelectorCriterion & SelectorCriterions, when selecting a Net occurrence,
we where storing the Net only. This was fine if the Net was belonging to
the Cell's top level. But when it was an occurrence of a non-top level
net, this was creating the elusive incoherent Occurrence problem.
Now we truly store the occurrence of the Net, to be accurate, the root
of the HyperNet.

* Change: In SelectorCriterions::add(), the Net* argument is replaced
    by a Occurrence of Net. Must be an HyperNet root occurrence.
      Same goes for SelectorCriterions::remove().
* Change: In CellWidget::select(), when called with a Net occurrence,
    select the whole HyperNet components.
* Change: In NetSelectorCriterion, now use a Net occurrence instead
    of directly a Net. Must be an HyperNet root net occurrence.
2022-07-13 11:20:24 +02:00
Jean-Paul Chaput 9d818df5b1 Computation of the relative area used by the registers in Etesian.
* Change: In EtesianEngine::toColoquinte(), not only compute the ratio
    of DFF versus the total number of gates, but also the ratio in
    term of area. As the DFF are usually very big cells compare to
    combinatorial one, the direct gate ratio could be misleading as
    to the "weight" of those cell in the design.
2022-06-05 20:36:41 +02:00
Jean-Paul Chaput 33a5cd3b0b Nicer looking of the dots in Bora::SlicingPlotWidget (IMHO). 2022-06-05 20:36:01 +02:00
Jean-Paul Chaput bbea20b4f6 Correct, again, the problem of PyLayoutGenerator in Python 3.
* Bug: In PyLayoutGenerator, in the method definition of setVerboselevel(),
    the error was not METH_STATIC but the lack of METH_VARARGS flag.
2022-06-05 20:35:39 +02:00
HoangAnhP 77ecf5523d Merge branch 'devel' of gitlab.lip6.fr:vlsi-eda/coriolis into devel 2022-06-03 17:03:24 +02:00
HoangAnhP aed63ccdf5 Seabreeze, first commit 2022-06-03 16:48:17 +02:00
Jean-Paul Chaput 33e148440c Correct a compliance problem with Python > 3.8 of METH_STATIC.
* Change: In PyLayoutGenerator, in the method definition of the class,
    replace the METH_STATIC flag by METH_CLASS for setVerboseLevel().
      There may be more of it elsewere, but as they didn't seem to
    have been triggered, we will see as it happens.
2022-05-27 18:09:12 +02:00
Jean-Paul Chaput 19504ad64f Correct misaligned contact in heavy load H-Tree.
* Bug: In cumulus/plugins.block.htree.HTree._connectLeaf(), the stacked
    contact to connect the top left buffer amplifier was not forcibly
    aligned on the vertical METAL5. In some configuaration it was
    leading to gaps at METAL5 level.
2022-05-26 23:40:30 +02:00
Jean-Paul Chaput 5b469e458f Bug in AutoSegment::getEndAxis() computation.
* Bug: In AutoSegment::getEndAxes(), as the NonAligned flag may be
    wrong, always loop over the aligneds (if any). Then, the
    target axis computation was wrong, using a min() instead of
    a max().
      This was, in turn, wrongly activating isNearMinArea() and
    causing non-minimal length segment to have their extremeties
    extented. And, in the end, Track overlap.
2022-05-26 17:51:25 +02:00
Jean-Paul Chaput 2efae3507e Remove unconnected part of the nets after HFNS.
This was the reason why we, sometimes got "UNCONNECTED" errors in the
VHDL PORT MAP statements. This was the remnants of the originally
connected driver.

* Bug: In Etesian::BufferTree, as the root driver is disconnected from
    all the sinks, but the top tree buffer, we may end up with
    unconnected signal on instances that were using it.
      So now, call BufferTree::rcleaupNet() to remove the Net in
    the Cell that where used to "transmit" the original driver.
* Bug: In Etesian::BufferTree, no longer use a _isDeepNet attribute
    guessed from the occurrences pathes of the RoutingPad, but
    trust the Net::isDeepNet() method.
2022-05-25 17:09:00 +02:00
Jean-Paul Chaput 86d539fe5d Add a breakoint after perfoming HFNS in cumulus.plugins.block. 2022-05-25 17:08:34 +02:00
Jean-Paul Chaput c17c4c3f6e Add management for very rare segment cross blocking (ripup loop).
* New: In Katana::DataNegociate, add a "sameRipup" counter to keep
    the *consecutive* number of time a segment is put in the same
    track.
* New: In TrackSegment::setAxis(), update/reset the "sameRipup"
    counter of the DataNegociate.
* New: In TrackCost, add new flag "Blacklisted" to mark Tracks that
    have been riped up too much in a consecutive row.
      TrackCost::Compare::operator() will then sort the blacklisted
    track after the non-blacklisted ones.
* New: In SegmentFsm CTOR, raise the Blacklist flag on the TrackCost
    if the "sameRipup" is above 10. This to get away from a state
    well in the ripup.
2022-05-23 17:58:17 +02:00
Jean-Paul Chaput c877d7e980 Forgot to merge the router failure status in chip.chip.doPnR(). 2022-05-21 18:49:55 +02:00
Jean-Paul Chaput a94a290c9b Be a bit more lax for out of bound requests in Track::getBeginIndex(). 2022-05-21 13:19:51 +02:00
Jean-Paul Chaput ba23a362fb Bad protection layer used in NetBuilderHV::doRp_AutoContact().
Bug: In NetBuilderHV::doRp_AutoContact(), when encountering a
  punctual RoutingPad in METAL1, create the protection in the
  METAL2 layer instead of METAL1 (current layer).
2022-05-21 13:19:28 +02:00
Jean-Paul Chaput 53db943d14 Discriminate between I/O pin and block pin in NetBuilder.
* Bug: In NetBuilder::setStartHook(), trigger the "move up" of
    global routing only when encountering RoutingPad of a macro
    block and *not* an I/O pin of the whole block (at the edge).
    Boils down to look if the RoutingPad is anchored on a Pin
    or a Segment (macro block).
2022-05-21 13:03:38 +02:00
Jean-Paul Chaput 1babec2e91 Save VHDL model only once in the rsave Cumulus plugin.
* Bug: In cumulus/plugins/rsave.py, the Cells where saveds each time
    one instance of was encountered. Resulting in multiple saves.
    It was, of course, ineficient, but it also triggers a bug
    that seems to happen after multiple save : the VHDL additional
    property was deleted *before* the full hierarchical dump was
    finished.
      Now, we save each Cell only once so it does not occur, but
    should make a deeper investigation later.
2022-05-21 13:02:58 +02:00
Jean-Paul Chaput 42bf5d29d4 General review & redesign of the "minimum area checking" for segments.
* Change: In AutoHorizontal::setDuSource() & ::setDuTarget() (& AutoVertical),
    check that the requested "du" is less than a pitch (this is not an
    upper bound). Issue a warning if not true.
* Change: In AutoSegment::revalidate(), when passing the previous span
    interval to expandToMinLength(), if we are in creation stage, make
    it empty because it has no sense yet and can lead to a lock in a
    too narrow span.
      Change the coupled behavior of expandToMinLength() vs.
    unexpandToMinLength(), the call to "unexpand" will be done on
    AutoSegments that are flagged with SegAtMinArea, instead of
    using the return value of "expand". This way we control across
    multiple revalidate() if a segment can be "unexpanded".
* Bug: In AutoSegment::expandToMinLength(), not only try to shift left
    if we are beyoond the max bound but also to the right if we are
    below the min bound.
      the span on the target and source were miscalculated, we must
    add the half-minimal distance to get the span inside the Track.
* Change: In AutoSegment::isMiddleStack(), rename into isNearMinArea()
    as we check for any *small length* set of AutoSegments and not
    only the one part of a middle stack. In some rare instances,
    two aligned segments can nevertheless be too short.
* Bug: In AutoSegment::reduceDoglegLayer(), when finding a reduced
    segment also reset it's duSource & duTarget because it will
    no longer be an isolated strip of metal.
* Change: In AutoHorizontal::updateOrient(), when there is a
    source/target swap, no need to exchange the dxSource and
    dxTarget extentions.
* Change: In AutoHorizontal::setDuSource() & ::setDuTarget(), check
    for du bigger than the pitch, which should never occur and
    display a warning.
      Same modification in AutoVertical.
* Change: In Track::repair(), now invalidate the shifted segments
    to ensure cache coherency with the TrackElement.
      Do not take AutoSegment in non-preferred direction into
    account, and especially do not try to resize them.
      Now, invalidate the corrected segments (see below).
* Change: In KatanaEngine::finalizeLayout(), move the track repair
    stage from here into NegociateWidow::run(). This way we avoid
    the false warning about segment overlap in the data-base final
    check. The false warning was because the AutoSegment where
    shifted but not invalidated/revalidated leading to a cache
    incoherency in the TrackElement. Now they *are* invalidated
    and updated.
* Bug: In Track::checkMinArea(), do not check for minimal area when
    a segment is overlapping a same net neighbor. To avoid false
    minimum area violation warnings.
2022-05-18 14:54:14 +02:00
Jean-Paul Chaput ab13a02eed Do not make dogleg on segments in non-preferred routing direction.
* Bug: In AutoContactTurn::updateTopology(), in some case we were making
    doglegs on segments in non-preferred routing direction (mostly M2).
    This must be never be done. As, by construction, at least one segment
    of the turn must be in the preferred routing direction, always use
    this one to make the dogleg.
      This bug is likely to explain the remaining "bad spin" in the
    final self-check of the routing data-structure.
2022-05-12 17:54:05 +02:00
Jean-Paul Chaput d3b7251eac NetRoutingExtension::get() failsafe when net is NULL. 2022-05-12 17:53:21 +02:00
Jean-Paul Chaput 5ff81b59ec Separate count from the list of indexes in configuration.IoPin. 2022-05-12 17:52:55 +02:00
Jean-Paul Chaput 59c0ab067b Mangle the "'" in Verilog to VHDL translator. 2022-05-12 17:52:22 +02:00
Jean-Paul Chaput 0a64f3b83d Create and connect dummy signals for unconnected *outputs* in BLIF parser. 2022-05-12 17:51:56 +02:00
Jean-Paul Chaput 921c519bd3 More detailed error message in case of VHDL PORT MAP discrepency. 2022-05-12 17:51:30 +02:00
Jean-Paul Chaput cd60032d9c Added direct management of macro blocks I/O pins in METAL2 & METAL3.
The decoupling of the cell gauge and the routing gauge implies that
the METAL2 & METAL3 terminals of macro blocks cannot be aligned on
the routing tracks anymore. That is, an horizontal METAL2 terminal
will not be on a track axis, but offgrid, so we no longer can use
a METAL2 horizontal segment to connect to it. Making an adjustement
between the offgrid terminal and the on-grid segment has proven
too complex and generating difficult configuration for the router.
Moreover, METLA2 terminal could be fully inside a METAL2 blockage.
So now, when the gauges are decoupled, we connect the METAL2 and
METAL3 the same way we do for METAL1: *from above* in the perpandicular
direction and using a *sliding* VIA. We assume that those kind of
terminals in upper metals are quite long.

* New: In Hurricane::Rectilinear, export the isNonRectangle() method
    to the Python interface.
* New: In CRL::RoutingGauge, add function isSuperPitched() with the
    associated boolean attribute. Set to true when each pitch of
    each layer is independant (not low fractional multiples).
* New: In AnabaticEngine, add the ability to temporarily disable the
    canonize() operation (mainly used in dogleg creation).
* New: In AutoSegment::canonize(), do nothing if the operation is
    disabled by AnabaticEngine.
* Bug: In Session::_revalidateTopology(), disable the canonization
    during the topology updating of a net. Too early canonization
    was occuring in makeDogleg() leading to incoherencies when
    performing the later canonization stage over the complete net.
    Mostly occured in the initial build stage of the net.
* New: In GCell, add function postGlobalAnnotate(), if a layer
    is fully blocked (above 0.9), typically, under a blockage,
    add a further capacity decrease of 2 on the edges. So we may
    handle a modicum of doglegs.
* Bug; In GCell::addBlockage(), removeContact(), removeHSegment()
    and removeVSegment(), forgot to set the Invalidated flag.
    This may have lead to innacurate densities.
* Change: In GCell::updateDensity(), more complex setting of the
    GoStraight flag. This flag is now set if we don't have two
    *contiguous* below 60% of density. We need free contiguous
    layers to make doglegs.
* New: In NetBuilder, now manage a current state flag along
    with the state flag of the *source* GCell. This flag is used
    to tell if the GCell needs it's *global* routing to be done
    using the upper layers (METAL4 & METAL5) instead of the
    lower ones.
* New: In NetBuilder::setStartHook(), set the state flag of the
    GCell to ToUpperRouting when processing a global routing
    articulation and one of the base layer is obstructed
    above 0.9.
      In GCell with terminals, also set ToUpperRouting when there
    are some in METAL2 / METAL3 and the gauge is not super-pitched.
* New: In NetBuilder, function isInsideBlockage(), to check if a
    terminal is completely or partially enclosed in a blockage.
* Change: In NetBuilderHV::doRp_AutoContact(), remove support for
    trying to put on grid misaligned METAL2/METAL3.
      Instead systematically access them from above.
      Do not cover with fixed protection terminals that are already
    enclosed in blockages.
* Bug: In NetBuilderHV::doRp_AutoContact(), always add the terminal
    contact in the requested GCell and not the target/source one,
    in case the terminal span several GCells.
* Change: In NetBuilderHV::doRp_Access(), create the local wiring
    according to the RoutingPad layer.
* Change: In NetBuilderHV::_do_xG(), _do_2G(),
    create the global wiring in upper layers, according to the
    ToUpperRouting flag.
* Change: In NetBuilderHV::_do_xG_xM3(), now delegate to
    _do_xG_xM3_baseRouting() and _do_xG_xM3_upperRouting() if the
    density at terminal level is above 0.5.
* New: NetBuilderHV::_do_xG_xM3_baseRouting() and
    _do_xG_xM3_upperRouting() separated function to manage the
    local routing.
* Change: In NetBuilder::_do_globalSegment(), if the currently
    processed GCell or it's source is in ToUpperRouting mode,
    move up the global segment. Do *not* use the moveUp() function
    which would create doglegs unwanted at this stage.
* New: In KatanaEngine::annotateGlobalGraph(), call postGlobalAnnotate()
    on the GCell after the blockages have been taken into accound to
    add the penalty.
* Bug: In Track::getPrevious(), correctly manage the 0 value for the
    index argument. Strange it didn't show earlier.
      Same goes for Track::expandFreeInterval().
2022-04-27 21:56:41 +02:00
Jean-Paul Chaput 908231c4c4 Missing BigVia import and some typos. 2022-04-03 13:19:49 +02:00
Jean-Paul Chaput 4ffd91822f Added support for SPICE terminal ordering from .spi files.
After a Cell has been created in memory (by parsers or Python scripts)
we can annotate it with the Spice parser so it will know the right
order with which to create the subcircuit call ('x').

* New: In CRL::Spice::load(), add support to read the ".subckt" card
    and guess the right ordering for generating the 'x' (subcircuit
    card call).
* Bug: In Spice::SpiceBit & Spice::BitExtension, when a Net bit property
    is removed, if it's the currently cached property in BitExtension
    it may lead to a crash. So when a property is destroyed, we must
    also clear the cache (see remove(), clearCache() & onReleasedby()).
      I'm wary that this could also happen on other kind of cached
    extensions...
* New: In CRL::NamingScheme, new method vhdlToVlog() to translate back
    VHDL net name into Verilog. Currently only changes "()" into "[]".
    Used to generate the commented SPICE interface for Alliance compliance.
* Change: In Spice::Entity, previously all the ordering where removed
    between each run of the SPICE parser, but the orders read from
    SPICE file (mostly standard cells) must be kept. So add a flag
    ReferenceCell to prevent the removal by ::destroyAll().
2022-04-03 13:18:42 +02:00
Jean-Paul Chaput fd624f03b6 Forgot emiting "layoutAbouttobechanged" in NetlistModel::setCell().
* Bug: In NetlistModel::setCell() template, forgot to send the
    "layoutAboutToBeChanged" signal before disconnecting the
    netlist datas. This seemed to go unnoticed until ported
    under Qt5. Was generating strange random core dump when
    running the engines with a net kept selected. Disgraceful
    crash during demos...
2022-01-26 19:41:39 +01:00
Jean-Paul Chaput 7f936367f8 Fix deletion bug in Selector::_preDestroy().
* Bug: In Selector::_preDestroy(), *do not* iterate over the _cellWidgets
    map as we destroy it's elements! We end up in destroyed ones...
    Instead destroy the first one until the map is empty.
2022-01-26 19:34:31 +01:00
Jean-Paul Chaput a5d92ecc29 Beautification, display "boundaries" below everything else.
* Change: In CellWidget::_redraw(), the boundaries, that is, instances
    abutment boxes where drawn *after* everything else, so they where
    hiding more interesting informations (especially at low zoom level)
    like routing wires.
      Now draw them *first* so they are *below*.
2022-01-26 19:31:01 +01:00
Jean-Paul Chaput 6210d312fe Correct the image snaphot generation (CellImage).
* Change: In CellImage::setScreenCellWidget, fully copy the display
    settings from the reference widget (not just part of them).
* Bug: In CellImage::toImage(), if the abutment box of the displayed
    cell is not *fully* includer in the viewer area, do *not* try to
    reframe it. The reframe() method seems to be buggy, works OK
    just without calling it.
2022-01-26 19:25:50 +01:00
Jean-Paul Chaput 08b951047c Update to support BFD 2.35.2 to generate file/line in stack traces. 2022-01-26 19:19:01 +01:00
Jean-Paul Chaput b54380e05d Merge branch 'devel' of gitlab.lip6.fr:vlsi-eda/coriolis into devel 2022-01-15 17:28:44 +01:00
Jean-Paul Chaput b6192e78c1 Minor documentation patchs to work with RHEL9. 2022-01-15 17:28:21 +01:00
Jean-Paul Chaput 1d839711ad Merge branch 'lefdef-out' into 'devel'
Bind DEF/LEF export to Python and make it useful for real processes

See merge request vlsi-eda/coriolis!14
2022-01-14 13:42:39 +00:00
Jean-Paul Chaput c805f4d6e4 Fix stupid mistake of "trace" import in core2chip.cmos.py. 2022-01-13 11:16:07 +01:00
Jean-Paul Chaput 22dd3ddc73 Remove bison generated yy.tab.h. Included by mistake. 2022-01-12 16:31:46 +01:00
Jean-Paul Chaput c41bd36279 Small code presentation improvements. 2022-01-12 16:27:47 +01:00
Jean-Paul Chaput 762e25adde More Python 3 corrections.
* Change: In unicorn/python/unicornInit.py, when iterating over all the
    loaded modules, now we have "namespace" that have a __file__
    attribute which is set to None. Skip them.
* Change: In stratus1/st_net.py, "is" must be replaced by "==" when
    doing string comparison.
* Change: In stratus1/st_parser.py, open file in "rb" mode instead
    of "r" (so we get a bytestream as now required by Python).
2022-01-12 16:25:01 +01:00
gatecat 6c66208e0c def: Write route segments
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-12 14:14:15 +00:00
gatecat 9635cc3311 lef: Fix MANUFACTURINGGRID order
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-12 13:42:03 +00:00
gatecat c4ef465c41 def: Fix order of instance transforms
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-10 19:45:24 +00:00
gatecat 4250c5bec7 def: Fix export of pins
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-10 18:47:13 +00:00
gatecat a8dd84838b def: Fix export units for non-lambda processes
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-10 16:54:04 +00:00
gatecat ddb684bfe1 defexport: Make it useful for real processes
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-10 16:54:04 +00:00
gatecat 4884a5d6dc crlcore: Add Python bindings for DEF export
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-10 16:54:04 +00:00
gatecat 2f1caca812 lefexport: Make it useful for real processes
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-10 16:54:04 +00:00
gatecat e1c5366fef crlcore: Add Python bindings for LEF export
Signed-off-by: gatecat <gatecat@ds0.me>
2022-01-10 16:54:04 +00:00
Jean-Paul Chaput 0d7deafe81 Remove mistakenly commited backup file. 2022-01-01 17:15:41 +01:00