* Change: In CRL::vstDriver(), remove all Vhdl properties after running.
The properties are not updated if the cell (Entity) change, so the
next time it is called, an incomplete or incoherent state was saved
(for example, incomplete "port map"). Removing all properties is
less efficient but works.
* Cleanup: In CRL/helpers/overlay, remove forgotten debug message.
* Change: In CRL/etc/common/etesian.py, use double parameters
instead of percentages to simplify. For space margin and form
factor. This need the rewrite of coriolis2/settings.py in
alliance-check-toolkit.
* Bug: In CRL/helpers/overlay.CachedParameter.cacheRead(), values where
not read *from* the Configuration DB, due to a forgotten "self.".
In CRL/helpers/overlay.CfgCache.__setattr__(), value was simply
never set! Only interval and set of values were manageds!
In CRL/helpers/overlay.CfgCache.__getattr__(), must distinguish
between two access cases, when were are truly accessing a
CachedParameter, return it's *value*. Otherwise, it is a
recursive CfgCache, then return the object.
* New: In CRL::AllianceFramework::wrapLibrary(), can now add in the set
of AllianceLibrary one which is wrapped around another one. All the
cells must be already present and do attempt to save them with
AllianceFramework (AP parser will drive nonsensical datas).
* New: In CRL/helpers.overlay.CfgCache, create a class to fully handle
all the Configuration parameters settings. That is, range and
enumerated values. This way we can fully create them from
the CfgCache instead of merely changing the value of an
existing one.
Examples:
cfg.anabatic.gcell.displayMode = 1
cfg.anabatic.gcell.displayMode = ( ("Boundary", 1), ("Density", 2) )
cfg.katana.hTracksReservedLocal = 4
cfg.katana.hTracksReservedLocal = [ 0, 20 ]
* New: In CRL/helpers/utils.py, create a Python "class decorator".
Works like a decorator but without the need of implementing
the Concrete/Abstract classes structure Design Pattern.
Create proxies in the derived class for the base class
attributes & methods.
* Change: In cumulus/plugins/alpha/block/configuration.py, enrich
the BlockState object to support core2chip parameters. Make it
even more autonomous from the Block class.
* New: In cumulus/plugins/alpha/core2chip, port of the core2chip plugin
and integration with the alphs/block plugin. At "constant features"
as a first. Only ported "cmos", phlib will be later.
Note: Keep the various hfnsX.py as toolboxes for future experiments.
* New: cumulus/plugins/block/hfns3.py, build the trunk of the
net as a RMST. First with the "Iterative One Steiner Point"
(terribly slow above 100 points) then with FLUTE.
For the global routing trunk, must be very cautious to
check that the cluster "graph point" is the one of the
it's buffer RoutingPad so both end up in the same GCell.
* New: cumulus/plugins/block/timing.py, stub for basic
timing computation and conversion between sink and
capacitance. Currently based on the fake 350nm given as
example in SxLib ("man sxlib"...).
* New: In Hurricane::NetRoutingProperty, add and change the meaning
of the following flags:
- ManualGlobalRoute : now means that a global routing *trunk*
is present, made of "gmetalh", "gmetalv" & "gcontact".
- Manualdetailroute : added, get the former meaning of
ManualGlobalRoute, that is, the detailed routing is
already present for this net, but can be changed by the
detailed router. Implies that it respect the Terminal,
HTee & VTee structuration.
* New: Add Anabatic::Diskstra::loadFixedGlobal(), to account
a manually global net into the edges capacities.
* New: In Anabatic::Edges::ripup(), exclude manually global routed
segments from the ripup. Change the segment sorting function
so that thoses segments are put in head of list (considered
as "smaller").
* Change: In AnabaticEngine::setupPreRouteds(), now detect manual
global routed and manual detail routed signals, and tag them
accordingly.
* New: In AnabaticEngine::Configuration & Session, add proxies
for the global routing layers ("gmetalh", "gmetalv", "gcontact").
* New: In Anabatic::Constants, add flags for global fixed and
detail routed nets.
* Change: In KatanaEngine::updateEstimateDensity(), now use int64_t
for flute coordinates.
* New: Add CRL::RoutingGauge::hasLayer(), to know if a layer is
managed by the gauge (comparison by mask).
* New: In CRL::PyAllianceFramework, export getCatalog(), in PyCatalog,
export the getState(name) method and add a PyCatalog_Link().
In PyCatalogState, add PyCatalogState_Link(), cannot use the
macro because of the C++ name resolution operator (Catalog::State).
* New: In Isobar, export the RoutingPads collection to the Python interface.
* New: In Hurricane::Net, export the getRoutingPads() method to the
Python interface (hence the need of the previous export).
* New: Added multiple clock support in H-Tree generation in alpha/block.
* New: In CRL/etc/<NODE>/<TECH>/plugins.py, added three new parameters
for block plugin config:
"block.spareSide" : The size of the minimum side of a buffered area.
(quad-tree leaf).
"spare.buffer" : The model of the cell buffer to be used.
"spare.maxSinks" : max number of sinks on a buffer before issuing
a warning (non-blocking).
* Bug: In Etesian::BloatCell::getAb(), never apply the bloat profile to
fixed cells. In case of buffers from the spare maxtrix it was leading
Coloquinte to detect an overlap of fixed cells, which it do not
support (rightly so).
* Change: In CRL/helpers.Trace, flush stderr before issuing the trace
message to avoid mixing up stdout & stderr (sometimes misleading).
* Change: In CRL/helpers.overlay.CfgCache, no longer display all the
applied setting after a call to apply(). Too verbose.
* Change: In CRL::Environment, regex_t are now pointers instead of values,
this way the "in initialization" flag can be removed (maybe still too
complicated).
* New: In CRL/helpers.overlay.CfgCache, add support for context manager,
so we can progressively remove the use of Configuration. One class
to use in all contexts (immedaite setting or storing a set of
Cfg parameters).
* New: In CRL/helpers/overlay.py, CfgCache class to hold a set of
configuration parameters and apply it on demand. It has a
different behavior than Configuration.
* Bug: In Hurricane/Commons.h, modify the getRecord<>() templates so
that for both vector<Element> and vector<Element*>, the individual
record created for each element are donne with pointers. That is,
for the vector<Element> case, we take a pointer.
As a general policy, except for the POD types, always use pointers
or references to data in the records/inspector. Never uses values
that can call the copy constructor.
Suppress INSPECTOR_PV_SUPPORT() macro, keep only
INSPECTOR_PR_SUPPORT().
Provide value support only for getString<>() template.
This value & copy constructor problem was causing a crash when
trying to inspect Hurricane::AnalogCellExtension.
* New: In Hurricane::Technology, change the API of the PhysicalRule,
now we can only create/get PhysicalRule, but setting the value of
the rule itself must be done on the rule.
Enhance PhysicalRule to provide for stepped rules, non isotropic
and ratio rules.
Merge TwoLayersPhysicalrule in PhysicalRule, much simpler to
suppress the management of derived classes. That means that we
loose a little memory as some fields are mutually exclusive.
Not a problem considering that there will not be so many of thoses
objects.
* New: In CRL/helpers.analogtechno.py, enhanced DTR support for rules
like:
('minSpacing' , 'metal1', ((0.4,20.0), (0.8,1000.0)), Length, 'REF.1')
('minEnclosure', 'metal1', 'cut1', (0.2,0.3) , Length, 'REF.2')
('minDensity' , 'metal1', 0.30 , Unit , 'REF.3')
The DTR parser has been updated, but not the oroshi.dtr Rule
cache for analog components. Given a rule name, the value used
will be the horizontal one of the first step.
* Change: In hurricane/doc/hurricane, re-generate the documentation
with updated support for Technology & PhysicalRule.
* Change: In CRL/helpers/__init__.py, to ensure a complete restart of
the database the __init__.py must be called again, but it's not the
case with reload() (see Python doc). So helpers.resetCoriolis()
must explicitly removes the Coriolis related Python modules from
sys.modules (calling "del sys.modules[moduleName]").
That list of Coriolis Python modules is built by calling
helpers.tagConfModules(), it will tag all modules added to
sys.modules since startup. It will remove (much) more than
Coriolis modules, but that should be ok.
* Change: In CRL/etc/{node*,symbolic}/TECH/__init__.py, add a call to
helpers.tagConfModules() for the techno modules to be erased on
reset.
* Bug: In CRL/Vhdl::VectorPortMap::toVhdlPortMap(), two problems:
1. Bad condition for the use of VstUseConcat. Must be used *only*
when there is more than *one* mapped name.
2. Missing case, when there is exactly *one* mapped name, that
means that we have one full width vector to vector assignement.
There may be another weakness here, for the portmap we assumes
that both vector are mapped in the *same* direction (which is
"downto" by our convention).
3. In the "bit by bit mapping case" (every bits of the vector are
differents bits), use the "signal + bit index" name instead of
juste the signal name (i.e. full width).
Solves the Libre-SOC/soclayout/experiment6/fpmul64 problem, now
we can avoid the YOSYS_FLATTEN.
* Change: In Vhdl:::Signal::toVhdlPort(), in Alliance VST signal with
undefined directions are typed "linkage". This may not be compatible
with vasy, so allow to replace them by "in".
* New: In CRL::Catalog::State, add a new flag VstNoLinkage to tell if
the VST driver should not use the "linkage" type.
* Change: In Vhdl::Entity, add a VstNoLinkage flag to disable the use
of the "linkage" type.
* New: In vlsisapd/PyConfiguration, add asDouble() to the Parameter
Python wrapper.
* New: In CRLCore/helpers/overlay, add support for float parameters
in configuratuon.
* Bug: In CRL::VectorPortmap::toVhdlPortMap(), unconnected bits where
correctly checkeds for multi-bits vectors (both ordered and holed),
but not for mono-bits connections (ONE bit of a vector).
* New: In CRL::NamingScheme, add a flag VstNoLowerCase, and its
management it in the Verilog to VHDL converter.
* Change: In CRL::BlifParser::Model::toVhdlModels(), disable the
lowercasing of identifiers. We shouldn't apply Alliance VHDL
subset constraits when reading blif files. So we will see
uppercase identifiers in Coriolis.
* Change: In CRL::VstParser, no longer lowercase identifiers that
are *not* VHDL keywords. Uppercases are legals in VHDL...
* New: In CRL::Catalog::State, add a new flag VstNoLowerCase to
tell if the VST driver should keep the uppercases.
* Change: In CRL::VhdlEntity, add a VstNolowerCase flag to disable
the lowercasing.
* Change: In CRL::vstDriver, lower case the file name if needed.
remove the previously opened filename if it differs from the
lowercased one.
* Change: In UnicornGui CTOR, disable VHDL enforcement for the
Blif parser.
* Change: In CRL::BlifParser, formerly, a zero/one cell was added for
each vss/vdd direct connection, generating a huge flock of cells.
Now only generate one per netlist.
It can be discussed whether to old behavior is more desirable,
it is a compromise between wire and area.
* Change: In CRL::AllianceFramework::getCell(), if the Cell is marked
as TerminalNetlist, then it may be a standard cell. So it's layout
must be loaded. So now, systematically try to load the layout of
netlist terminal cells.
* Change: In CRL::LefParser::_macroCbk(), create a Catalog entry for the
newly read MACRO (that is Cell) and sets the Logical, Physical,
InMemory and TerminalNetlist flags.
* Bug: In CRL::LefParser::_siteCbk(), check for NULL cell gauge.
* New: In CRL::AllianceFramework, add setCellGauge(), to set the default
cell gauge. Exported to Python.
* Change: In CRL/etc/common/technology.py, create variables for VIA
layers, so we can modify their properties afterwards.
* New: In CRL/etc/node45/freepdk45, port the configuration files to the
new Python "importable" format.
Note: in kite.py, all the gauges (Routing & Cells) must be named
"LEF.CoreSite" to please my LEF parser, so it can match the gauge
name with the SITE name for standard cells.
* Bug: In Anabatic::NetBuilderVH::_do_2G(), forgotten to be reimplemented
from the base class. Simply redirect to _do_xG().
* Change: In Katana::PowerRailsPlanes::PowerRailsplanes(), create plane
from the layers in the RoutingGauge and their associated blockages
instead of sweeping through all the basic layers.
Allow to distinguish bewteen "METAL" (symbolic) and "metal" (real).
* Bug: In CRL::ApParser::_parseInstance(), the instance coordinates where
stored in *static* variables (boo). Making the parser *not* reentrant.
But in _parseInstance(), it can be recursively called through
getCell() when an sub-instance layout was missing.
Also make non-static all other variables in the various parser
function.
* Bug: In CRL::VstParserGrammar & VstParserScanner, when loading the
instances models, we where loading both logical & physical views.
This was causing cases of reentrency of the parser, with reset
of the lexer static dictionary, leading to memory corruption.
Now the identifiers are stored in the YaccState of each
parsed cell and we only recursively call for the logical view.
* Change: In CRL::ApParser::_parseInstance(), recursively load the
physical views as they are no longer loaded by the Vst parser.
* Change: In CRL::AllianceFramework::getCell(), sets the
TerminalNetlist flag from the state (mode 'C' in CATAL) onto
the cell.
* Change: In EtesianEngine::loadLeafcelllayouts(), new functions to
load the layouts of the leaf cells if only the netlist has been
loaded.
* Bug: In CRL::ApDriver::DumpSegments(), reset the direction field to
NULL between iterations so it is recomputed for each component and
not keeping the first one ever guessed.
* Change: In CRL/helpers, cumulus/plugins, oroshi & karakaze,
Move towards more Python PEP8 compliance:
* All indentations sets to 4 spaces (in progress).
* In plugins, remove messages about software collections
and RHEL (too many case could wrongly lead to that).
Instead systematically uses "helpers.io.catch()".
* Put in lowercases all modules names. Note that C++ exported
modules *keep* their Capitalized names (to preserve the
identity with the C++ namespace).
* When making import, use full path.
* Rename the run function from "ScriptMain()" to "scriptMain()".
* Cleanup: In CRL/etc, remove obsoleted configuration files,
the one ending in ".conf". Keep those who have not been ported
to the new style yet.
* New: In Hurricane/src/configuration, first trial at replacing the
C preprocessor macros by C++ templates. Applied first to configuration
from VLSISAPD.
This is unfinished business, just a limited demonstrator for now.
It is installed as a separate Python library "Cfg2" which do not
interact with the rest of Coriiolis.
The end goal is to fully remove boost and merge VLSISAPD useful
components directly inside Hurricane.
* New: In Isobar::PyResistor, manage type RPOLYH and RPOLY2PH.
* Change: In Hurricane::Resistor, rename plate nets from "PIN1" and
"PIN2" into "t1" and "t2" (try to respect uniform naming scheme).
* New: In Karakaze/AnalogDesign.py, support for reading Resistor
parameters.
* New: In Orosshi, ResistorSnake.py imported from Mariam Tlili's work
and associated Resistor.py to make parameter conversion.
Currently we only uses vertical layout for resistors.
Added METAL2 horizontal terminals for resistors.
* Bug: In CRL::ApDriver::DumpSegments(), when saving RoutingPads build
on Pin *not* at the top level (that is, Pin from an instance),
use the pin's orientation to choose the segment type.
* NORTH/SOUTH becomes a Vertical.
* EAST/WEST becomes an Horizontal.
Formerly, the segment direction was guessed only for the bounding
box, leading to segments in incorrect directions leading to DRC
errors (in nmigen/ALU16, net "b(10)").
* Bug: In CRL/symbolic/cmos/technology.py, forgotten import for
WarningMessage.
* Change: In all tools, FindTOOL.cmake, no longer use LIB_SUFFIX to
search for tool libraries but try "lib64/" then "lib/".
* Change: In bootstrap/socInstaller.py, take Debian 10 into account.
* Change: In bootstrap/docker, move from Debian 9 to Debian 10.
In the Cell/Instance hierarchy, the "terminal" and "leaf cell" concepts
where not clearly defined and partially overlapping. Now, "Terminal" is
the refer to the physical hierarchy (layout) and "TerminalNetlist" to
the logical hierarchy (netlist). The logical hierarchy can be less deep
than the physical one thanks to a Cell dedicated cell flags. Collections
related to the physical hierarchy keep their old names, the one related
to the logical hierarchy are renamed from "Leaf" to "TerminalNetlist".
The name "Leaf" was too ambiguous (leaf for *what* hierarchy).
* Change: In Hurricane::Device, set the "TerminalNetlist" flag once and
for all. No need set it in all the derived classes again.
* New: In Hurricane::MultiCapacitor, added new parameter "dummy" to
create dummies around the capacity matrix.
* Change: In Hurricane::Cell, remove "Leaf" related methods, replace
them by "TerminalNetlist" one, especially Collections. Now we have
two clear sets of Collections to walkthough the layout or the
netlist.
Change the "Terminal" flag into "TerminalNetlist".
* Change: In Hurricane::CellCollections, rename "Leaf" into
"TerminalNetlist" collections and apply the new semantic to the
locators.
* Change: In Hurricane::DataBase, Leaf to TerminalInstance renaming.
* Change: In Hurricane::DeepNet, Leaf to TerminalInstance renaming.
* Change: In Hurricane::HyperNet, Leaf to TerminalInstance renaming.
* Change: In Hurricane::Instance, Leaf to TerminalInstance renaming.
* Change: In Hurricane::Viewer::HierarchyInformations, Leaf to
TerminalInstance renaming.
* Change: In CRL::AllianceFramework, Leaf to TerminalInstance renaming.
* Change: In CRL::Catalog, Leaf to TerminalInstance renaming.
* Change: In CRL::ApParser, Leaf to TerminalInstance renaming.
* Change: In EtesianEngine::AddFeeds, Leaf to TerminalInstance renaming.
* Bug: In EtesianEngine::resetPlacement, move there the loop over
non terminal netlist instances to flag fully placed sub-blocks
as terminal for the netlist. Only then remove the feed cells
from unplaced instances. Previously, the feed cells where stripped
even from already placed instances.
* Change: In Katana, Leaf to TerminalInstance renaming.
* Bug: In Bora::PyDSlicingNode, allow the range parameter to be the
Python None object when we do not want to pass one but need to
have it as positional parameter.
* Change: In Cumulus/clocktree/ClockTree.py, Leaf to TerminalInstance
renaming.
* New: In CRL/etc/node600/phenitec, ported configuration of Phenitec 0.6um
Compliant with DataBase reset.
* New: In CRL/python/helpers, added function "unloadUserSettings()" to
unload Python modules prior to a full reset.
Added "resetCoriolis()" to perform full DataBase reset.
* Change: In CRL::AllianceFramework, make it a derived class of DBo so
the destroy() is now provided.
* Bug: In CRL::AllianceFramework::getCell(), do not attempt any load if
the library list is empty. Should never occur except in case of a
botched databse reset.
* New: In CRL::AllianceFramework, new method "saveCATAL()" to write back
the catalog of a library and "saveCells()" to write back the cells.
Note: only cells actually loaded in memory will be write back.
* New: In CRL::Catalog, add method "saveToFile()" to write back the CATAL
of a library.
* Change: In CRL::ParserDriver, replace "const string&" by "string"
(improved string support of the GNU STL).
* Change: In CRL::ParserSlot, use string instead of Name.
* Change: In CRL::ApParser, make _layerInformation an ordinary attribute
instead of a static one. This allow for it's correct resetting
across databas resets.
* Change: In CRL::VstParserGrammar, reinitialize Vst::framework at each
parser call. Needed to support database reset.
* New: In Hurricane::DBo, add an object counter to be sure that when
we perform a reset, no remaining DBo is allocated. This is different
of the object id which is ever increasing.
Note that, at reset, we check against "1" remaining element as at
this point only Database is still allocated.
Add a new "resetId()" method. MUST NEVER BE CALLED except by
DataBase::_preDestroy().
* New: In Hurricane::Database, new clear() method to remove the Cells
of all the libraries in reverse hierarchical depth order.
Make use of the new CellsSort class.
* Change: In Hurricane::DataBase::_preDestroy(), call "clear()" and
DBo::resetId().
* Change: In Hurricane::Breakpoint, change the default callback to be
a static function. So we can restore it later.
* Bug: In Hurricane::Instance::_preDestroy(), there was yet another
loop of deletion over a collection for the shared pathes.
Replace it by the repetitive deletion of the first element.
* Bug: In Hurricane::Net::_preDestroy(), RoutingPads must be destroyed
prior to any other component.
* New: In Hurricane::ColorScale, add a "qtFree()" method for freeing
the Qt Brush, Pen & Color.
* New: In Hurricane::DrawingStyle, add a "qtFree()" method for freeing
the Qt Brush, Pen & Color.
* New: In Hurricane::Graphics, add a "disable()" method to call the
various "qtFree()" of the sub-objects.
* Bug: In CRL/BlifParser::Model::mergeAlias(), when a signal is aliased
toward $true or $false in a Blif file (through a ".name" statement),
it was directly merged to "vdd" (resp. "vss"), and if it is an
external signal, this leads to its removal, potentially making "hole"
in its interface.
Now, create a gate zero or one for each tied up/low signal. This
way the interface is fully kept. At the cost of some supplemental
gates.
* Change: In documentation, now generate the overall documentation using
Pelican instead of Sphinx. This allows to have an unified approach
between the coriolis.lip6.fr website and the local documentation.
So we keep using "only" two doc generators: doxygen & Pelican.
* Change: In bootstrap/FindBoostrap.cmake, remove the -fsanitize=address
as it requires the "san" librarie which may be difficult to install.
* Change: In CRL/symbolic/cmos45/kite.py, decrease the METAL3 pitch from
10l to 8l. This is for testing with 4 routing metal only technology
like AMS c35b4 symbolic.
* Change: In Katana/BloatProfile, add static bloat option, that is, only
cell bloated in the first pass will be bloated again in subsequent
ones.
Add a "katana.bloatOverloadAdd" parameter to more easily control the
amount added to the computed overload.
* Change: In Oroshi, start integration of multi capacitors as generator.
Translate generator parameter into CapacitorStack ones. Add code for
routing unit capacitor.
* Change: In Hurricane::Viewer::ExceptionWidget & CRL/python/helpers/io.py,
downscale icons for non-HiDPI screen.
* Change: In CRL/etc/common/display.py, change the display threshold of
METAL1 layer so it do not appear at high scaling.
* New: In Etesian, activate the "setFixedAbHeight()" feature and export it
to Python. Allows to increase the space margin at constant height.
To be used by the P&R conductor.
* Change: In Unicorn/cgt.py, when running a script, insert the current
working directory at head of the sys.path, not at the end. So installed
modules do not shadow local one.
* New: In Anabatic::Edge, new accessor "getRawcapacity()" to know the full
capacity of the edge, that is, the real maximum number of tracks that
can go through the associated side.
* Change: In Katana/BloatProfile/Slice::tagsOverloaded(), bloating policy
change, now bloat all the instances under the GCell, not only the first
one.
* Change: In KatanaEngine::runGlobalRouter(), restore the search halo growth
policy to expanding of 3 GCells every 3 iterations.
New metrics displayed, the edge wire length length overload.
* Change: In cumulus/plugins/ConductorPlugin.py, now accepts the following
configuration parameters:
- "anabatic.globalIterationsEstimate", maximum number of global
iterations during the bloating computation passes.
- "conductor.useFixedAbHeight", tells wether the additionnal blank
space must be added so the aspect ratio is kept or the height is
kept (and the block become wider).
Disable the display of "rubber" to unclutter a little the view.
This commit contains two set of features that should have been commited
separately.
1. Compliance with clang 5.0.1, tested with the RedHat collection
llvm-toolset-7. This allow Coriolis to be compiled under Darwin (MacOS)
with Xcode & macports. The bootstrap install system has been modificated
accordingly.
2. The basic support for routing density driven placement. Related
features are:
* Bloat property. Each Occurrence of an Instance can be individually
bloated. This property not attached to any tool to allow the placer and
router to share it as wanted. Nevertheless, it is defined in Etesian.
* BloatProfile in Katana, add individual Bloat properties to Instances
occurrences based on the East & North overflowed edges of each GCell.
* Support in ToolEngine for a "pass number" of a tool. This pass number
is mainly used to make "per pass" measurements. The MeasureSet system
is improved accordingly to support multiple values of a same measure.
* Embryo of "P&R Conductor" to perform the place & route loop until the
design is successfully placed. May be the first brick of a Silicon
Compiler.
* Change: In boostrap/FindBoostrap.cmake, in setup_boost(), added tag to
the python component for macport (ex: python27).
* Change: In boostrap/build.conf, put etesian before anabatic for
instance occurrence BloatProperty dependency.
Added option support for the "llvm-toolset-7" collection to build
against clang 5.0.1.
* Bug: In Hurricane::getRecord( const pair<T,U>& ), the getSlot<> templates
for first & second arguments must be called with <const T> and <const U>
as the pair itself is const (and not simply <T> & <U>).
* Change: In Hurricane::getSlot() temlate, only use "string" arguments and
not const string&, simpler for template argument deduction.
* Bug: In Hurricane::AnalogCellExtension, the StandardPrivateProperty<>
template has a static member "_name". Clang did show that the template
for this static number has to be put inside the namespace where the
template *is defined* (i.e. Hurricane) instead of the namespace where
it is instanciated (i.e. Analog).
* Bug: In Isobar, Matrix_FromListOfList(), PyInt_AsPlacementStatus() must
be put outside the C linkage back in the Isobar C++ namespace (clang).
* Bug: In Hurricane::DBo::~DBo, and derived add a throw() specification
(clang).
* Bug: In Hurricane::RegularLayer::getEnclosure() & setEnclosure(), change
signature so it matches the one of the base class (clang).
* Bug: In Hurricane::CellPrinter, use double brackets for initializer list
(clang).
* Change: In Hurricane::Breakpoint, reverse the meaning of the error level.
Only error level *lesser or equal* than the stop level will be enabled.
* Bug: In CRL/python/helpers/__init__.loadUserSettings(), must put the
current working directory in the sys.path as in certain configuration
it may not be included.
* Bug: In CRL::ApDriver, DumpSegments(), no longer generate segments when
encountering a RoutingPad on a top-level Pin Occurrence. The segment
was generated in the wrong direction, creating DRC violations on the
"mips_core_flat" example.
* Change: In CRL::Measures, partial re-design of the measurements management.
Now, each kind of measure can accept multiple values put in a vector.
The index is intented to match a tool run number.
* Change: In CRL::Histogram, add support for multiple sets of datas,
indexeds with tool run number.
* Change: In CRL::ToolEngine, add support for multiple pass number, add
addMeasure<> templates for the various data-types.
* Change: In CRL::gdsDriver & CRL::gdsParser(), comment out unused GDS record
name constants.
* New: Etesian::BloatProperty, property to attach to Instance occurrences
that contains the extra number of pitch to add to the cell width.
* Bug: In AutoSegment::CompareByDepthLength, the segment length comparison
was wrong, it was always returning true, which broke the "strick weak
ordering" of the comparison.
This was producing a core-dump in GCell::updateDensity() when sorting
a vector<>. The end() iterator was being dereferenced, leading to the
problem.
* Bug: In Katana::DataSymmetric::checkPairing(), the test for segments
whose axis is perpandicular to the symmetry axis was wrong
("!=" instead of "-").
* New: In Katana/GlobalRoute, new ::selectSegments(), selectOverloadedgcells()
and selectBloatedInstances() to automatically select segments from
overloaded edges, overloaded GCells and bloated cells.
* Change: In KatanaEngine, return a more detailed success state, distinguish
between global and detailed.
Add support for multiple routing iterations.
* New: In cumulus/python/plugins/ConductorPlugin.py, embryo of routing
driven placement.
* Bug: In CRL/python/helpers/__init__.py, in textPythonTrace(), when an
ErrorMessage was catched, the trace parameter was not correctly
extracted leading to an "exception in exception".
* New: In Isobar/PyCell, exported Cell::getNonLeafInstanceOccurrences()
collection.
* New: In Isobar/PyTransformation, type is now built so the tp_compare
is linked to the C++ operator==().
* Change: In Hurricane::SelectionModel, Hurricane::SelectionWidget and
CellWidget, no longer use Occurrences but directly the Selector property.
We also use the Selector to know if an Occurrence is selected by
looking at that property on it's Quark. This avoid a very lengthy
search in vector when there is many elements (say > 10000).
NOTE: This is a bad implementation as there is a confusion between
beeing selected (that is, having a Selector property attached to
an Occurrence Quark) and being actually displayed as selected.
This lead to awkward implatation of the various "toggle" methods.
Have to rethink that more clearly later.
* Bug: In CRL::Histogram, the non-inline template full specialisation
of Measure<Histogram> must not be put in the header but in the module
to avoid multiple definition and link failure. They are actually
real, classic functions.
* New: In CRL/python/helpers.io, vprint() wrapper around print to display
messages according to the verbose level.
In etc/*, add messages in every configuration files so we may know
under which we are running.
* Change: In Hurricane::Isobar/PyHurricane.h, make the hash function use
the DBo id whenever possible instead of the object pointer, fall back
to it for standalone objects (Box like one). The DirectHashMethod()
macro generate a C style function (linkage) which call a template
function "getPyHash<>()" that uses a SFINAE mechanism to select
the right variant.
Create two comparison macros DirectCmpByPtrMethod() and
DirectCmpByValueMethod() to customize the comparison for objects that
have C++ operator==(). So now two boxes with the same contents will
be seen equal by Python. For DBo objects we keep the previous
comparison by C++ pointer.
* Change: In CRL::RoutingLayerGauge::getHorizontalGauge(), when selecting
the default gauge, try, if possible to avoid the PinOnly one.
Same goes for the vertical one.
* Bug: In Katana::TrackCost CTOR, symmetric track axis position was wrong,
was using the reference instead of the symmetric.
* Bug: In BoraEngine::updatePlacement(), set up the Dijkstra search halo
to one pitch so it can use immediately neighboring channels.
* New: In BoraEngine, added python startup hook like in Katana. Mainly
to setup debug nets.
* New: In BasicLayer::Material, added "info" kind of material for layers
that are only informationals (i.e. not real GDS one). Created to
store geometric combination of layers, this is a temporary solution.
Have to define a clearer semantic for that.
* New: In CRL/helpers/AnalogTechno.py, new "Count" type for count numbers
that must not go through DbU::Unit converter. They are plain integers,
but stored in DbU::Unit (keeping track of that semantic is left to
the user).
* New: In Analog, added Analog::ResitorFamily & Analog::Resistor classes.
* New: In Analog, added inspector support for all Parameter classes.
* New: In Analog, new FloatParameter class (for resistor value).
* New: In CRL/etc/scn6m_deep_09/devices.py, added resistor device.
* New: In Oroshi, support for Resistors, stub for ResistorSnake generator.
* New: In Bora::DNodeSets, added support for Resistor devices.
* Change: In Bora::DSlicingNode, rename setNFing()/getNFing() into
setBoxSetIndex()/getBoxSetIndex() for semantic coherency.
* New: In Karakaze/python/AnalogDesign.py, added support for Resistor.
Change in addDevice(), the span which was only meaningful for
transistor devices is replaced by a parameter argument.
The parameter argument has to be consistent with the device type.
* Bug: In Technology::getPhysicalRule(), if the named layerdo not exists,
throw an exception instead of silently putting a NULL pointer inside
a rule.
* New: In Hurricane/Analog, new parameters classes for capacitor devices:
- Analog::Matrix, a matrix of null or positives integers to encode
capacitor matrix matching.
- Analog::Capacities, a list of float values for all component of a
multi-capacitor.
* New: In Hurricane::Script, add a "getFileName()" method to get the full
path name of the Python module.
* Change: In Analog::LayoutGenerator, completly remove the logger utility
as it is no longer used. Simply print error messages instead.
* Change: In Analog::MetaCapacitor, rename top & bottom plate 'T' & 'B'.
Accessors renamed in "getTopPlate()" & "getBottomPlate()".
* New: In Analog::MultiCapacitor, complete rewrite. Makes use of the
new parameters "capacities" and "matrix". Dynamically generates it's
terminals as we do not know beforehand how many capacitors could be
put in it.
* Bug: In isobar/PyHurricane.h, in Type object definition, do not prepend
a "Py" to class name (so the keep the C++ name).
* Change: In CRL/etc/scn6m_deep_09/devices.py, add entry for the new
capacitor generator.
* New: In oroshi/python/ParamsMatrix, add a "family" entry in the [0,0]
element to distinguish between transistor, capacitor and resistor.
(this is the matrix of values returned to the LayoutGenerator after
device generation).
Now have one "setGlobalParams()" function per family.
* New: In oroshi/python/Rules.py, added DTR rules needed by capacitors.
Catch exceptions if something wrong append when we extract the rules
from the technology.
* New: In Bora, the devices are no longer *only* transistors, so the
possibles configurations are no longer defined only by a number of
fingers. We must be able to support any kind of range of configuration.
So the explicit range of number of fingers is replaced by a base
class ParameterRange, and it's derived classes:
- Bora::StepParameterRange, to encode the possible number of fingers
of a transistor (the former only possibility).
- Bora::MatrixParameterRange, to encode all the possible matching
scheme for a capacitor. As there is no way to compress it, this
is a vector of Matrix (from Analog).
* Change: In Bora::DSlicingNode::_place(), the ParameterRange has to be set
on the right configuration (through the index) before being called.
The generation parameters are taken from the active item in the
ParameterRange.
* Change: In Bora::NodeSets::create(), iterate over the ParameterRange
to build all the configuration. Adjustement to the routing gauge
pitchs are moved into the DBoxSet CTOR to save a lot of code.
Semantic change: the index in the NodeSets is now the index in
the associated ParameterRange and no longer the number of fingers
of a transistor.
Check that the ParameterRange dynamic class is consitent with the
device family.
* Change: In Bora::DBoxSet, same semantic change as for NodeSets, the
number of finger become an index in ParameterRange.
In DBoxSet::create(), now also perform the abutment box adjustement
to the RoutingGauge, if possible.
* New: In Karakaze/python/AnalogDesign.py, add support for Capacitor
devices.
* In CRL::Cyclop/CMakeLists.txt, add *again* the MOC files to the list
of .cpp . Don't know what is happening here with MOC under Qt 5.
* In CRL/python/helpers.io, cleanly fails if neither PyQt 4 nor PyQt 5 is
found. And tell it directly because this the module tasked to handle
the exceptions/errors...
* In Cumulus/plugins/AboutWindow.py, try PyQt 4 then PyQt 5.
* In documentation/UsersGuide, now tells explicitely that Qt 4 must be
used under RedHat 7 and Qt 5 under Debian.
* New: In bootstrap/coriolisEnv.py, add the "etc" directory to the
PYTHONPATH as initialization are now Python modules.
* New: In Hurricane/analogic, first groundwork for the integration of
PIP/MIM/MOM multi-capacitors. Add C++ and Python interface for the
allocation matrix and the list of capacities values.
* Change: In Hurricane::RegularLayer, add a layer parameter to the
constructor so the association between the RegularLayer and it's
BasicLayer can readily be done.
* Change: In Hurricane::Layer, add a new getCut() accessor to get the
cut layer in ViaLayer.
* Change: In Hurricane::DataBase::get(), the Python wrapper should no
longer consider an error if the data-base has not been created yet.
Just return None.
* Bug: In Isobar::PyLayer::getEnclosure() wrapper, if the overall
enclosure is requested, pass the right parameter to the C++ function.
* Change: In AllianceFramework, make public _bindLibraries() and export
it to the Python interface.
* Change: In AllianceFramework::create(), do not longer call bindLibraries().
This now must be done explicitely and afterwards.
* Change: In AllianceFramework::createLibrary() and
Environement::addSYSTEM_LIBRARY(), minor bug corrections that I don't
recall.
* Change: In SearchPath::prepend(), set the selected index to zero and
return it.
* Change: In CRL::System CTOR, add "etc" to the PYTHONPATH as the
configuration files are now organized as Python modules.
* New: In PyCRL, export the CRL::System singleton, it's creation is no
longer triggered by the one of AllianceFramework.
* New: In CRL/etc/, convert most of the configuration files into the
Python module format. For now, keep the old ".conf", but that are no
longer used.
For the real technologies, we cannot keep the directory name as
"180" or "45" as it not allowed by Python syntax, so we create "node180"
or "node45" instead.
Most of the helpers and coriolisInit.py are no longer used now.
To be removed in future commits after being sure that everything
works...
* Bug: In AutoSegment::makeDogleg(AutoContact*), the layer of the contacts
where badly computed when one end of the original segment was attached
to a non-preferred direction segment (mostly on terminal contacts).
Now use the new AutoContact::updateLayer() method.
* Bug: In Dijkstra::load(), limit symetric search area only if the net
is a symmetric one !
* Change: In Katana/python/katanaInit.py, comply with the new initialisation
scheme.
* Change: In Unicorn/cgt.py, comply to the new inititalization scheme.
* Change: In cumulus various Python scripts remove the call to
helpers.staticInitialization() as they are not needed now (we run in
only *one* interpreter, so we correctly share all init).
In plugins/__init__.py, read the new NDA directory variable.
* Bug: In cumulus/plugins/Chip.doCoronafloorplan(), self.railsNb was not
correctly managed when there was no clock.
* Change: In cumulus/plugins/Configuration.coronaContactArray(), compute
the viaPitch from the technology instead of the hard-coded 4.0 lambdas.
In Configuration.loadConfiguration(), read the "ioring.py" from
the new user's settings module.
* Bug: In stratus.dpgen_ADSB2F, gives coordinates translated into DbU to
the XY functions.
In st_model.Save(), use the VstUseConcat flag to get correct VST files.
In st_net.hur_net(), when a net is POWER/GROUND or CLOCK also make it
global.
* Change: In Oroshi/python/WIP_Transistor.py, encapsulate the generator
inside a try/except block to get prettier error (and stop at the first).
* Change: In Hurricane::Script, when running a script, no longer do it
inside a Python sun-interpreter, use the current one. This way we
no longer have our modules initialized twice or more, which was
starting to be unmanageable (with the NDA support).
The settings were re-read multiple time to the same value, so it
was working, but still...
I hope I didn't left some dangling Python objects now.
* Bug: In Hurricane::LayoutGenerator::drawLayout(), get the device abutment
box though a Pyhon object *before* finalizing which removes that objet.
* New: In cumulus/plugins/__init__.py, add a "loadPlugins()" and static
initialisation to preload plugins modules.
We use that pre-loading step to append to the module __path__ attribute
the alternate directory where a NDA covered may be found. This assume that
the directory tree under the NDA root is identical to the one under the
public root.
* New: In cumulus/plugins/chip/__init__.py, small utility function
importContants() to import the constants inside another module namespace,
to have more consise notations.
* Change: In cumulus/plugins/, in the various plugins sub-modules import
use the full path from plugins, that is, for example:
from plugins.core2chip.CoreToChip import IoPad
* Change: In Unicorn/python/unicornInit.py, no longer directly load the
plugins modules, this is now done by cumulus/plugins/__init__.py.
Instead, iterate through sys.modules for the ones starting by "plugins/"
and try to execute a Unicorn hook, if present.
* Change: In Karakaze/python/AnalogDesign.py, update for the new Instance.create()
prototype (added placement parameter).
* New: In CRL::ApDriver::DumpSegments(), drive as top-level segments the
RoutingPads using a Pin, and not only using a segment. They are not
exported as top level Pin but only as Segment as they do belong to
a deeper level.
* New: In Cumulus/plugins/PadsCorona.Side._placePads(), now manage both
"pxlib" and "phlib*". Pad library management is still hardcoded, this
should be made a configuration option someday.
* Bug: In CRL::cstDriver(), re-activate the management of the VstUseConcat
flag. Why was he removed in the first place?
* Change: In KatanaEngine::runGlobalRouter(), no longer give the details of
each overflowed edge and the complete list of impacted nets.
Only a count.
This commit degrades the run success rate of ARMv2a to 87% (40 iters).
* New: In CRLcore/etc/.../kite.conf, add configuration parameters:
katana.termSatReservedlocal
katana.termSatthreshold
for the new edge capacity computation system.
* New: In CRLcore/etc/symbolic/phenitec06/, add support for N. Shimizu
small I/O pads (supplied in phlib80). Tune various parameters of
Anabatic/Katana to increase routing success.
* Change: In CRLcore/alliance/ap/ApParser, make Pin external components,
so RoutingPad will be build upon in global routing.
Do not complain when a I/O pad has a physical instance that did
not exists in the netlist. Just create it (appeared in phlib80).
When no netlist instance exists in a pad, the pad Cell is still
considered as terminal.
* New: In Etesian::BloatCells, new profile named "3metals" better suited
for two routing metals technologies (i.e. Phenitec).
* New: In Anabatic::RawGCellsUnder, new CTOR which take only source &
target points instead of a segment. Needed to manage wide segment for
which the axis to consider is not that of the segment (one axis for
each track it intersect).
* New: In Anabatic::GCell, add a RoutingPad count attribute, for Edge
reservation computation.
* New: In AnabaticEngine::computeEdgeCapacities(), instead of decreasing
all edges of a fixed amount (hTrackReservedLocal), guess the GCell
cluttering from the number of RoutingPads that it contains.
For non-saturated GCells, the four edges are decreased by the number
of RoutingPads. We use the maximum from the two neigboring GCells.
The hTrackReservedLocal parameter is now used only as a *maximum*
that the edge reservation can reach.
If a GCell is saturated (more than 8 RoutingPads, the saturation is
propagated horizontally to 2 neigboring GCells).
* Change: In AutoContactTerminal::getNativeConstraintBox(), use a more
flexible gauge name matching for terminal vertical extensions correction.
Namely, match all "msxlib*" kind of gauges.
* Change: In AutoSegment::setAxis(), add the ability to force the axis
position, even if it is a non-canonical segment. Maybe needed in the
initialisation steo, before the first canonisation is performed.
* New: In NetBuilder, added new methods _do_1G_1PinM1() and _do_2G_1PinM1(),
to manage coronas for Phenitec designs.
To avoid various side effects from segments being too close from
the north / east side of the routing area, make those segments fixeds.
* Change: In KatanaEngine::annotateGlobalGraph(), the management of wide
wires was wrong. The axis to use to find the underlying GCells is the
one of the track, not of the segment. This was creating bad edge
capacity computation under the power ring of a block and subsequently
routing failures.
* New: In Kanata::Manipulator, added method reprocessParallels(), not used
though, but keep it anyway, might be of use later...
* New: In Kanata::Manipulator, added method avoidBlockage() for terminal
METAL2 in non-preferred direction, restrict the terminal and turn
constraint box at the current position of the perpandicular, so it
doesn't create a deadlock in METAL2.
* Change: In SegmentFsm::conflictSolveByPlaceds(), if we cannot break
using the whole overlap, try the first atomic overlap.
* New: In SegmentFsm::_slackenStrap(), manage conflict between a non-prefered
segment and a blockage, this when to call avoidBlockage()...
* New: In Katana::Configuration, management of the new edge computation
parameters:
katana.termSatReservedlocal
katana.termSatthreshold
* New: In Cumulus/plugins/Core2Chip, support for Phenitec I/O pads.
* Bug: In cumulus/plugins/PadsCorona.py, when a pad is at the beginning
or at the end of the side, the pad corona terminal may be outside
the corona range (not directly facing it). In that case, create a
bend to reach it.
Worse, in some case more than one (but likely no more), could be
in that case, so not only do we create a bend but also make a
shift in the bended segment so two consecutive ones are not on the
same axis, causing shorts.
If both end pads of a corner are in that case, we cannot prevent
a short, so at least, issue a warning.
* Bug: In CRL::Vhdl, the Entity::VstUseConcat was not passed correctly
along, so we did get a strange mix of conat and direct assignment.
* New: In Unicorn/cgt.py : added --vst-use-concat options to control
the VST driver behavior.
* Bug: In CRL::ApDriver & CRL::ApParser, when saving a fused net, do not
use it's name but put a star (*) character to set it anonymous.
Having all component named was creating problems in cougar and
subsquently in yagle (bad name for master latch).
Conversely, in the parser, if the name of the net is "fused_net",
make it a real fused_net and not an ordinary one.
* New: In CRL::AllianceFramework::saveCell(), through the view flag we
can pass an option 'CRL::Catalog::State::VstUseConcat' to tell the
driver tu use or not the concat '&' in PORT MAP statements.
It is not completely clean that the flag for controlling the VST
driver behavior is put in the Catalog states, but it's easier for
now...
And, of course, exported at Python level.
* New: In CRL/etc/symbolic/phenitec06, configuration for symbolic
layout targeted for Phenitec 0.6um (do not contains any NDA
covered informations). Could be used for any 3 metal layers
techno.
* Bug: In Cumulus/plugins/chip/Configuaration.py, _setStackposition()
disable stack error when there is no slave component on the stack
(happens when the stack consists only of one contact).
* In CRL::vstDriver(), remove the Vhdl::EntityExtension right after driving
the file. This avoid keeping in memory a mostly usnused structure and
solve the "second write after modification" problem.
* Change: In CRL/BlifParser::Model::mergeAlias(), do not always merge the
net2 with net1 (RHS with LHS of the ".name" instruction). This may
result in a name change in the design interface (external net).
Instead, merge any internal net with the external, so keep the
external net name. If both are external, keep the one with the lower
id (which should have been created first).
* Change: In Hurricane::SharedName, replace the incremental Id by a hash key.
This is to ensure better deterministic properties. Between use cases,
additional strings may have to be allocated, shitfing the ids. Even if
hash can be duplicated, we should be able to ensure that the absolute
order in map table should be preserved. Supplemental strings are inserted
in a way that keep the previous order.
* Change: In CRL/etc/symbolic/cmos/kite.conf, add "katabatic.routingGauge"
default parameter value ("sxlib").
* Change: In CRL/etc/common/technology.conf, define minimal spacing for
symbolic layers too (added for METAL4 only for now).
* Change: In CRL::Histogram, extend support to dynamically sized histograms.
Add a text pretty print with table and pseudo-curve.
* Change: In Cumulus/plugins/ClockTreePlugin, create blockage under the
block corona corners so the global router do not draw wire under them.
This was creating deadlock for the detailed router.
When the abutment has to be computed, directly use Etesian to do it
instead of duplicating the computation in the Python plugin.
* New: In Etesian, as Coloquinte seems reluctant to evenly spread the
standard cells, we trick it by making them bigger during the placement
stage. Furthermore, we do not not uniformely increase the size of the
cells but create a "bloating profile" based on cell size, cell name
or it's density of terminals. Currently only two profiles are defined,
"disabled" which does nothing and "nsxlib" targeted on 4 metal layer
technologies (aka AMS 350nm, c35b4).
* Bug: In Knik::MatrixVertex, load the default routing gauge using the
configuration parameter "katabatic.routingGauge" as the default one
may not be the first registered one.
* New: In AnabaticEngine::setupNetDatas(), build a dynamic historgram of
the nets terminal numbers.
* Bug: In Anabatic::AutoContact::Invalidate(), always invalidate the
contact cache when topology is invalidated. In case of multiple
invalidations, if the first did not invalidate the cache, later one
that may need it where not allowed to do so. The end result was correct
nonetheless, but it did generate annoying error messages.
* Bug: In Anabatic::AutoContactTurn::updateTopology(), bad computation
of the contact's depth when delta == 2.
* Bug: In Anabatic::Gcell::getCapacity(), was always returning the west
edge capacity, even for the westermost GCell, should be the east
edge in that case.
* New: In Anabatic::AutoSegment, introduce a new measure "distance to
terminal". This is the minimal number of segments separating the
current one from the nearest RoutingPad. This replace the previous
"strong terminal" and "weak terminal" flags.
This distance is used by Katana to sort the events, we route the
segments *from* the RoutingPads *outward*. The idea being that if we
cannot event connect to the RoutingPad, there is no points continuing
as thoses segments are the more constraineds. This gives an order close
to the simple ascending metals but with better results.
* New: In Anabatic::AutoSegment, introduce a new flag "Unbreakable", disable
dogleg making on those segments. mainly intended for local segments
directly connecteds to RoutingPads (distance == 0).
* New: In Anabatic::AutoSegment, more aggressive reducing of segments.
Now the only case where a segment cannot be reduced is when it is
one horizontal branch in a HTee or a vertical on a VTee. Check if,
when not accounted the source & target VIAs are still connex, if so,
allow reducing.
* New: In Anabatic::AutoContact, new state flags CntVDogleg & CntHDogleg
mainly to prevent making doglegs twice on a turn contact. This is to
limit over-fragmentation. If one dogleg doesn't solve the problem,
making a second one will make things worse only...
* Bug: In Anabatic::Configuration::selectRpcomponent(), we were choosing
the component with the *smallest* span instead of the *bigger* one.
* New: In Anabatic::GCell, introduce a new flag "GoStraight" to tell that
no turn go be made inside those GCells. Mainly used underneath a block
corona.
* New: In AnabaticEngine::layerAssign(), new GCellRps & RpsInRow to manage
GCells with too many terminals. Slacken at least one RoutingPad access
when there is more than 8 RoutingPad in the GCell (slacken or change
a vertical METAL2 (non-preferred) into a METAL3).
* Change: In Anabatic::NetBuilderHV, allow the use of terminal connection
in non-preferred direction. That is, vertical METAL2 directly connected
to the RoutingPad (then a horizontal METAL2). This alllows for short
dogleg without clutering the METAL3 layer (critical for AMS c35b4).
Done in NetBuilderHV::doRp_Access(), with a new UseNonPref flag.
Perform some other tweaking on METAL1 access topologies, to also
minimize METAL3 use.
* New: In AnabaticEngine::computeNetConstraints(), also compute the
distance to RoutingPad for segments. Set the Unbreakable flag, based
on the distance and segment length (local, short global or long global).
New local function "propagateDistanceFromRp()".
* Change: In AnabaticEngine.h, the sorting class for NetData, SparsityOrder,
is modificated so net with a degree superior to 10 are sorted first,
whatever their sparsity. This is to work in tandem with GlobalRouting.
* New: In Katana::TrackSegmentNonPref, introduce a class to manage segment
in non-preferred routing direction. Mostly intended for small METAL2
vertical directly connected to RoutingPad. Modifications to manage
this new variant all through Katana.
* Change: In Katana::GlobalRoute, DigitalDistance honor the GoStraight flag
of the GCell. Do not make bend inside thoses GCells.
* Change: In KatanaEngine::runGlobalRouter(), high degree nets (>= 10) are
routed first and whitout the global routing estimation. There should be
few of them so they wont create saturations and we want them as straight
as possible. Detour are for long be-points.
Set the saerch halo to one GCell in the initial routing stage (before
ripup).
* Bug: In KatanaEngine & NegociateWindow, call _computeCagedconstraints()
inside NegociateWindow::run(), as segments are inserted into tracks
only at that point so we cannot make the computation earlier.
* Change: In Katana::Manipulator::repackPerpandiculars(), add a flag to
select whether to replace the perpandiculars *after* or *before* the
current segment.
* Change: In Katana::NegociateWindow::NegociateOverlapCost(), when the
segment is fully enclosed inside a global, the longest overlap cost
is set to the shortest global hoverhang (before or after).
When the cost is for a global, set an infinite cost if the overlapping
segment has a RP distance less or equal to 1 (this is an access segment).
* Bug: In Katana::PowerRailsPlane::Rail::doLayout(), correct computation of
the segments extension cap.
* New: In Katana::QueryPowerRails::addToPowerRail(), add support for Pad.
* Change: In Katana/PreProcess::protectCagedTerminals(), apply the contraints
to any turn connected to the first segment of the RoutingPad so the
perpandicular constraints got propagated to the perpandicular segment...
* Change: In RoutingEvent, cache the "distance to RP" value.
* Change: In RoutingEvent::Key::compare(), sort *first* on distance to
RoutingPad, then layer depth. If both distance to RoutingPad is null,
then sort on segment length.
* Change: In RoutingEvent::_processRepair(), try a repack perpandicular with
perpandiculars first (then with perpandicular last, then give up).
* Change: In SegmentFsm::bindToTrack() and moveToTrack(), set an axis hint
when creating the insertion event.
* Change: In SegmentFsm::_slackenStrap(), add a step through slacken between
minimize and maximum slack (wihch directly end up in unimplemented).
* Change: In Session::_addInsertEvent(), add an axis parameter needed when
the axis of the segment is not the one of the track (case of wide
segments or non-preferred direction).
* Bug: In Track::_preDestroy(), bad management of the TrackElement reference
count. Destroy the segment only when reaching zero...
* Bug: In Track::expandFreeIneterval(), forgotten to manage case when there
is a set of overlaping segments at the "end" of the track, the
EndIsTrackMax was not set.
* Change: In TrackCost::Compare, increase the cost when an overlaping
segment is at it's ripup limit. We should try *not* to rip it up if
we can. Add a dedicated flag "AtRipupLimit".
* Change: In TrackElement, add proxies for isUnbreakable(), new function
updateTrackSpan().
* New: In TrackFixedSegment CTOR, when a supply wire of METAL2 or above is
found, make the underlying GCells "GoStraight".
* New: In TrackElement::canDogleg(GCell*), check for already done perpandicular
dogleg on source/target (reject if so).
* New: In CRL/etc/symbolic/cmos45/kite.conf, new gauge "msxlib4" for both
routing and cells. Have only 4 metal layers but with all the same pitches
and width. Differs from the 45nm compliant where pitches double starting
from METAL4.
* New: In CRL/etc/symbolic/cmos45/plugins.conf, adjust default parameters for
the clock tree plugin so they are identical to the one of "cmos" (scaling).
* Change: In CRL/python/helpers/io.py, in catch(), do not set up the script
path here as it is non-informative.
* New: In Isobar::PyCell, export the isRouted() and setRouted() to the
Python interface.
* Bug: In CRL::Entity::parseEntity(), check that the closing parenthesis
is the last character of the net name. Issue a more relevant error
message.
* In Anabatic::NetBuilder::_do_xG() and all other unimplemented methods,
throw an error if called from a derived classes instead of just
issuing a message in the debug stream. Avoid later core dumps...
* In Anabatic::NetBuilderHV, implement the builders for GCells with
one pin. Needed to support chip/corona routing.
* Bug: In Cumulus/plugins/Chip.py, check that coronaCk exists before
using it.
* New: In Cumulus/plugins/PadsCorona/Side._placePad(), when routing
a design with symbolic pads, export the chip external "pad"
connectors to be able to perform a lvx (otherwise cougar do not
create external nets).
In Corona._createCoreWire(), set the minimal gap between the pads
and the corona to 6 pitches. Empirical value to avoid DRC errors
with symbolic pads (pxlib).
When successufully done, mark the Corona cell as routed.
* Bug: In Cumulus/plugins/Core2Chip.IoNet, the regex for vectorizet net
was wrong, it was allowing only one digit in the index.
* Bug: In Cumulus/plugins/Core2Chip.cmos, correct management of
pad & corona clock nets. Correct connexion between vdde/vddi.
* Bug: In Unicorn/cgt.py, forgot to execute scripts when in text mode.
* Change: In Hurricane::Error constructors disable the backtrace generation.
(*very* slow).
* Change: In Hurricane::Library::getHierarchicalname(), more compact
naming. Remove the name of the root library.
* New: In Hurricane::Net, new type "FUSED", for component with no net.
More efficient than having one net for each.
* Change: In CellViewer, BreakpointWidget, use Angry Birds icons.
* Change: In CellWidget::State, use the hierarchical name (cached) as key
to the state. This allow to load two cells with the same name but from
different libraries in the widget history.
* Change: In PyGraphics, export "isEnabled()" and "isHighDpi()" functions.
* Change: In CRL/etc/symbolic/cmos/plugin.conf, and
CRL/etc/common/plugin.conf use the physical dimensions converters.
* Change: In CRL/etc/symbolic/cmos/technology.conf, make the GDS layer
table coherent with the default Alliance cmos.rds.
* New: CRL/python/helpers/io.py, put ErrorMessage new implementation here,
along with a new ErrorWidget written in PyQt4. It seems finally that
PyQt4 can be used alongside Coriolis Qt widgets.
New ErrorMessage.catch() static function to manage all exceptions
in except clauses.
* Change: In CRL/python/helpers/, no longer use ErrorMessage.wrapPrint(),
directly print it.
Rewrite the utilities to display Python stack traces "textStacktrace()"
and "showStacktrace()".
* Change: In CRL::AllianceFramework, shorten the names of the libraries.
* Change: In CRL::ApParser & CRL::ApDriver, more accurate translation between
Alliance connectors (C record) and Hurricane::Pin objects. Pin are no
longer made square but thin and oriented in the connecting direction.
Use the new fused net for unnamed components.
* New: In CRL::GdsParser, implementation of SREF parsing, i.e. instances.
Due to the unordered nature of the GDS stream, instances creation are
delayed until the whole stream has been parsed and only then are they
created.
For the sake of reading back Alliance s2r GDS, we assume that any
TEXT following a boundary is the Net name the boundary (component)
belongs to.
Create abutment box for Cells, computed from the bounding box, so
the Hurricane QuadTree could work properly.
Make use of the fused net for unnamed components.
* New: In Cumulus/plugins/chip, complete rewrite of the I/O pad management.
Now we can mix real (foundry) pads and a symbolic core.
To cleanly support the de-coupling between the real part and the
symbolic one we introduce a new intermediary hierarchical level, the
corona. We have now:
Chip --> Pads + Corona --> Core.
At chip level (and if we are using real pads) the layout is fully
real (excepting the corona).
The Corona contains everything that is symbolic. It has symbolic
wires extending outward the abutment box to make contact with the
real wires coming from the pads.
In the pad ring we can use corners instances (or not), pad spacers
or directly draw wires between connectors ring pads.
Provide two flavors: placement only or full place & route.
WARNING: If routing in a second step, *do not route* the *Chip* but
the *Corona*.
* Change: In Cumulus/plugins/clocktree, give the modified Cell an
additional extension of "_cts" (Clock Tree Synthesis) instead of
"_clocked", to follow the common convention.
* New: In cumulus/plugins/S2R.py, encapsulate call to Alliance S2R and
reload the translated Cell in the editor.
* New: In cumulus/plugins/core2chip, provide an utility to automatically
create a chip from a core. To work this plugins must have a basic
understanding of the pad functionalities which may differs from
foundry to foundry. So a base class CoreToChip is created, then for
each supported pad foundry a derived class is added. Currently we
support AMS c35b4 and Alliance symbolic cmos.
* Bug: In Anabatic::Configuration, read the right configuration parameter
"anabatic.topRoutinglayer" (Katana), and not the one for Katabatic...
* Change: In Unicorn/cgt.py, process the plugins in alphabetical order
to ensure a reproductible ordering of the menus...
* Bug: In CRL/etc/symbolic/cmos/plugins.conf, rails dimensions are no
longer expressed directly in lambda. Must be created using helper.l().
* Change: In CRL::ApParser, slightly more smart management of Pin width.
Must normalize Pin behavior between Alliance & Hurricane as in
Alliance they have only one dimension.
* Change: In CRL::LefImport, if a net name end with "!", assume it's a
global one. Have to check this naming convention.
* Change: In Anabatic::NetBuilderHV::_do_1G_1PinM3() & _do_1G_1PinM2()
now implemented. Needed for the corona routing support.
* Change: In AnabaticEngine::setupPreRouted(), exclude segments outside
the abutment box.
* Change: In KatanaEngine::PowerRails, remove the I/O pad support as now
we route only inside the Corona. So only one vdd/vss/ck are supported.
* New: In cumulus/plugins/ChipPlugin.py, complete rewrite of the chip
support:
* Uncouple pad I/O ring whith real cells (foundry) from a symbolic
core. A new intermediate level "corona" is introduced to handle
the real/symbolic transition.
* Ability to explicitly setup position of the pads on the chip side
in case of uneven distribution.
* Enable clock tree to be build with 3 metal only (M2 to M4) instead
of (M2 to M5).
* Bug: In Hurricane python module, forgot to add the Segment type.
* Change: In Isobar/layer.getEnclosure() wrapper check and cast the Layer
argument into BasicLayer.
* Change: In CRL::RoutingGauge::getLayerGauge(Layer*), getLayerType() and
getLayerDirection() no longer check layer identity based on layer
mask instead of just Layer* pointer. To allow a unified call wether
the layer is real or symbolic.
* Change: In CRL::RoutingLayerGauge::getTrackIndex() and getTrackPositon(),
no longer consider negative indexes as invalid and reset them to
zero. The check for out of bound index is now left to Anabatic &
Katana.
* Change: In CRL/RoutingGauge.getRoutingLayer() and getContactLayer(),
more detailed error message.
* Change: In CRL/RoutingLayerGauge.getTrackIndex() and getTrackPosition(),
indexes are now signed long instead of unsigned.
* New: In Hurricane::IntrusiveMap, introduce IntrusiveMapConst which allow
to search with a "const Key&" instead of a "Key", sparing the copy
construction of the Key.
* Change: In Hurricane::Cell::NetMap, use the new kind of map with
"const Name&" key access. This speeds up the Cell::getNet() method
by suppressing one copy construction of a Name, which are costly
after all...
Should review the whole code to use "const Name&" everywhere it
is possible.
* Change: In Hurricane::Entity & Hurricane::DBo, displace the unique
identifier from Entity to DBo (move up to the base class).This
to allow us to build deterministic map of DBo requireds in
UpdateSession (which is built upon a SharedProperty).
WARNING: This break the JSON database exportation support, do not
use it until fixed/rewritten.
* Change: In Hurricane::Layer, add an attribute to know if a layer is
associated to a blockage. Modificate accordingly PyLayer and
BasicLayer.
* Change: In Hurricane::SharedProperty, the set of owners (DBo*) is now
stored in a std::set sorted on the objects Ids, instead of a simple
vector. The linera search time through the std::vector was starting
to show (ISPD05 bigblue1).
* Bug: In Isobar::PyInstance, make full contructor signature (5 arguments)
conform to the C++ one. It was only accepting the four first and
forcing the placement status to be FIXED.
* Bug: In CRL/etc/symbolic/ispd05/kite.conf, update for the new configuration
requirements where all distance must be converted into DbU in the
file itself (use "helpers.l()", "helpers.m()"). Apply to the cell &
routing gauges.
* Bug: In CRL/etc/symbolic/ispd05/technology.conf, update for the new
configuration. "helpers.initTechno()" *must* by called first thing
in this file in order for the Technology to be created.
* New: In CRL::AllianceFramework, add matchCellGauge() &
matchCellgaugeByHeight()
* New: In CRL::CellGauge, add a flag to distinguish gauges meant for
IO Pads and an "isPad()" predicate.
* Change: In CRL::Ispd05Bookshelf, flush the UpdateSession stack every
1000 elements additions. Maybe not necessary now the the UpdateSession
property relies on a std::set instead of a std::vector.
* New: In CRL::LefImport, support for SITE and match/create the appropriate
CellGauge on the fly. Specific support for MACROS that are flagged PAD.
Add a dedicated post-treatment for PAD connectors, extend them toward
the boundary of the nearest abutment box side. Tested only on AMS 350nm
c35b4 for now.
This part is most likely to be tweaked for every kind of real foundry
pad that we may encounter...
* Change: In EtesianEngine::findYSpin(), use the C++ "for" construct to loop
over Collections.
* Change: In Unicorn/cgt.py, register the Python/C++ tutorial support by
default.
* Change: In CRL::DefImport, added callback to read the DEF UNITS statement
and perform a correct length conversion. Previously set to read pseudo
lambdas in hundredth of microns.
Added DefParser::getLefCell() to lookup master cells in the LEF
libraries before looking in the Alliance ones (rooted under "LEF"
library).
* Change: In CRL::LefParser::_pinPostProcess(), when no segment suitable
for terminal connexion is found, add all of them. This is a quick hack
and an a correct policy that match all techno must be implemeneted.
* New: In CRL::pyCRL, add a Python wrapper for DefImport.
* New: In CRL/etc/45/ispd18/ added configuration files for the "real"
technology used by the ISPD18 45nm design benchmarks.
* New: In Hurricane::Isobar::PySegment, added wrapper for getOppositeAnchor().
* Bug: CRL::PyRoutingLayerGauge, Python wrapper of getTrackPosition() was
in fact returning getTrackNumer().
* Bug: In Katana::PowerRailsPlanes::Rail::doLayout(), add the half minimum
distance to the blockage segments extensions. Was causing too near
VIAs is cmos45.
* Change: In cumulus/plugins/ClockTree, correctly manage routing gauge when
the lower pitches (M2/M3) is different from the upper one (M4/M5).
But we still can only do sxlib compliant gauges because we do not
handle a switch in preferred routing directions.
* Bug: In CRL::cyclop, on former versions of Qt 5 there was a double
link of the moc generated modules. This appears to be solved under
Ubuntu 10.04 LTS, so now we have to add them again explicitly.
* Bug: In Katana::Track::expandFreeInterval(), the OutsideElement case was
not handled correctly, the end index must be increased in that case.
As a result, this function was returning too short an interval.
This was affecting the computation of perpandicular free interval
in DataNegociate::update() for perpandicular fixed but not in a track.
* New: In Anabatic::NetBuilder and NetBuilderVH, now manage GCells with
one Pin, and up to three globals. Used to put terminals at the
edge of a block.
* New: In EtesianEngine, now manage placed Pins.
(done through extractInstanceName())
* Change: In CRL::RoutingGauge::getHorizontalGauge() no longer skip PinOnly
gauges to find the reference one (same goes for vertical).
* Bug: In Hurricane::DrawingQuery::drawGo(), forgot to apply translation
on Polygon and Rectilinear.
* Bug: In Hurricane::Rectilinear, forgot implementation of getContour().
Add a new accessor getPoints().
* Bug: In CRL::Blif::load(), do not always enforce translation towards
VHDL names. When loading LEF+gds it may change the Cell names between
the two stages so the gds layout do not get added to the LEF Cell
phantom.
Now add a boolean enforceVhdl argument (may be a flag in the future).
* Bug: In ::GdsStream::operator<<(Cell*), forgot to drive the Rectilinear.
* Change: In CRL/etc/cmos/kite.conf, setup correct H/K parameters for
the Katana global router. Value copied from Knik. They give a
faster solution.
* New: In CRL/etc/cmos45/, new symbolic settings adapted to FreePDK 45nm.
Courtesy of N. Shimizu. To be used with NSXLIB.
* New In CRL::System, add "coriolis_top" to the set of pathes available
to the user.
* Change: In Hurricane::CellWidget, new "isPrinter" attribute to know if
the CellWidget is used as a device for printing.
New function copyExtensionsGos() to duplicate the ExtensionGo drawing
callbacks. This is a temporary hack until the ExtensionGo are made static
to be shared by all CellWidgets.
In _redraw(), the DrawingQuery flags were not correctly reset between
different stage of the drawing. This was resulting of uneeded walkthough
of the slicing tree, along with incorrect display of some of the layers
(i.e. rubbers where diplayeds when ExtensionGos where active).
* Change: In GraphicKatanaEngine, fine tune the display of GCells for printing
CellWidget.
* Change: In Hurricane::CellPrinter, copy all the settings from the palette
of the reference (graphic) CellWidget into the printer CellWidget.
Also copy the ExtensionGos callbacks so we can print them. Use the
new CellWidget attribute "isPrinter" for the callbacks to be able
to adapt to Printer settings.
* Change: In Hurricane::Time::getStringTime(), only print two decimals
for time durations.
* Change: In Hurricane::CellWidget, set the minimal size to 350 pixels
to fit my normal DPI secondary screen...
* Change: In Hurricane::Error(), reactivate the backtrace generation by
default. Seriously slow down the program each time an Error is to
be constructed.
* Bug: In Analog::Device::preCreate(), check for NULL Technology before
attempting to use it.
* Change: In Hurricane/Analog, remove all '*Arguments*' classes and their
Python interface. It was an obsoleted way of passing devices parameters
to the Python layout generators (located in Oroshi). Now we just get
them straight from the Device with the getParamter() method.
* Change: In CRL::System CTOR, add Python pathes for Oroshi & Karakaze.
* Change: In Oroshi/Python/WIP_*.py layout generator scripts, remove
all uses of the "Arguments". Directly access the parameters through
the device itself. Make the checkCoherency() with identical arguments
as of layout().
* New: Bora tool that performs analog place & route. Based on a slicing
tree representation. It is the thesis work of Eric Lao.
Code beautyfication and some programming cleanup.
* New: Karakaze tool, provide the Python base class AnalogDesign used
to build an analog design. Create/configure devices and assemble
them in a slicing tree.
* Change: In Unicorn/cgt.py, display the stack trace in case of an
ImportError exception as well as for other exceptions.
Add Bora to the set for included tool engines.
* Change: In boostrap, remove support for Chams.
* New: In Hurricane::Technology, added support for DTR rules, UnitRule,
PhysicalRule and TwoLayersPhysicalrule. Added devices descriptors and
models descriptors (for Spice). Spice description is not used yet
but kept anyway in case of future use.
* New: Hurricane::Analog whole library and it's Python interface. This
provides support for transistors, capacitors and resistors. Only
transistor support is fully implemented as of now.
* New: In CRL/python/coriolisInit.py, read configuration files for the
Analog extension (analog.conf & devices.conf). Thoses are optionals
and a simple warning is issued if not found.
Added helpers/AnalogTechno.py DTR loading helper.
Add analog configuration files for 180/scn6m_deep_09.
* New: Oroshi tool that provides actual layout drawing for transistors.
* Change: In CRL::GdsStream, no longer export empty Cells as structures,
to avoid empty cells in Cadence. To prevent meta-transistors to be
exported as real physical objects.
Also put a hard-coded test to prevent exporting "control_r" model
which is made of AMS standard cells for "amsOTA".
* Change: In CRL/PyRoutingGauge, export the isHV() and isVH() methods so
the Stack can access it.
* Change: In Hurricane/PyCellViewer, export the removeHistory() method.
When a Cell is deleted, it must be also removed from the editor
history. This should be take care of automatically, but for now
we make it manually through scripts.
* Bug: In Anabatic::NetBuilder::doRp_accessAnalog(), the gauge offset
was not taken into account when creating initial Contact on
RoutingPad. The program self corrected afterwards, but with the
display of a disgraceful message.
* Change: In Anabatic::Configuration and Session, export the gauge offsets.
* Bug: In CRL::GdsDriver::GdsStream two bugs :
1. The tm fields are int but must be casted into uint16_t in BGNLIB
and BGNSTR.
2. The mandatory LIBNAME record was missing.
3. We also force, for now the dbu to be 1000 and the UU to be 1um.
Jean-Paul Chaput
Gabriel Gouvine