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caravel/verilog/gl
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Tim Edwards c3fc004072 Corrected an error in verilog/gl/chip_io_alt.v, which was missing 
connections to the core side VCCD1 and VSSD1 on the clamped3 pads.
Also added scripts for running LVS on chip_io to the mag/ directory,
and revised the scripts so that they will only re-run extraction if
there is no netlist file in the mag/ directory.
 		2021-12-07 10:06:35 -05:00
..
__user_analog_project_wrapper.v Modified all of the Makefiles to better handle the GL netlist simulations, 2021-12-03 17:13:53 -05:00
__user_project_wrapper.v Modified all of the Makefiles to better handle the GL netlist simulations, 2021-12-03 17:13:53 -05:00
caravan.v A handful of changes/corrections: (1) Housekeeping signal "user_clock" 2021-12-06 19:38:24 -05:00
caravel.v A handful of changes/corrections: (1) Housekeeping signal "user_clock" 2021-12-06 19:38:24 -05:00
caravel_clocking.v [DATA] Update caravel_clocking 2021-12-07 13:36:56 +02:00
chip_io.v [DATA] Update GDS views for the chip_io/chip_io_alt/mgmt_protect_hv/mgmt_protect to match the mag view 2021-12-07 14:28:29 +02:00
chip_io_alt.v Corrected an error in verilog/gl/chip_io_alt.v, which was missing 2021-12-07 10:06:35 -05:00
digital_pll.v [DATA] Update caravel_clocking/digital_pll/housekeeping 2021-12-02 21:09:43 +02:00
gpio_control_block.v [DATA] Update gpio_control_block (li1 used 2um) 2021-11-20 14:43:20 +02:00
gpio_defaults_block.v Modified the GL netlists to match the layout for the GPIO defaults 2021-11-29 20:17:11 -05:00
gpio_defaults_block_0403.v Modified the GL netlists to match the layout for the GPIO defaults 2021-11-29 20:17:11 -05:00
gpio_defaults_block_1803.v Modified the GL netlists to match the layout for the GPIO defaults 2021-11-29 20:17:11 -05:00
gpio_logic_high.v harden gpio_control_block 2021-11-04 16:19:12 +02:00
housekeeping.v [DATA] Update caravel_clocking/digital_pll/housekeeping 2021-12-02 21:09:43 +02:00
mgmt_protect.v [DATA] Update mgmt_protect (removed all li1 routing ) 2021-11-19 13:11:18 +02:00
mgmt_protect_hv.v Fix mgmt_protect_hv gate-level netlist 2021-12-07 13:38:30 +02:00
mprj2_logic_high.v [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
mprj_logic_high.v [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
spare_logic_block.v [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00
user_id_programming.v [DATA] Add gds/lef/maglef/gl views for the user_id_programming block 2021-11-15 18:17:32 +02:00
xres_buf.v [DATA] Add views for xres_buf 2021-11-15 18:07:02 +02:00