caravel/verilog/gl
manarabdelaty 64bdd6230d [DATA] Update caravel_clocking module floorplan 2021-11-19 01:26:29 +02:00
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caravel_clocking.v [DATA] Update caravel_clocking module floorplan 2021-11-19 01:26:29 +02:00
chip_io.v [DATA] Add chip_io views with the fixed clamped3 pad 2021-11-17 16:42:36 +02:00
digital_pll.v [DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz 2021-11-15 15:50:43 +02:00
gpio_control_block.v Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency 2021-11-05 18:36:43 +02:00
gpio_defaults_block.v Update gpio_defaults_block to align the pins with the gpio_control_block 2021-11-05 23:27:32 +02:00
gpio_logic_high.v harden gpio_control_block 2021-11-04 16:19:12 +02:00
housekeeping.v [DATA] Add HK views 2021-11-15 13:23:54 +02:00
mgmt_protect.v [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
mgmt_protect_hv.v [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
mprj2_logic_high.v [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
mprj_logic_high.v [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
user_id_programming.v [DATA] Add gds/lef/maglef/gl views for the user_id_programming block 2021-11-15 18:17:32 +02:00
xres_buf.v [DATA] Add views for xres_buf 2021-11-15 18:07:02 +02:00