caravel/mag
kareem 285ef6b642 reharden!: caravel
~ update the following views:
def
mag
verilog
spef(all corners)
+ add the ability to override the interactive script filename
+ add the ability to run openlane regression using regression.config
file
~ change GRT ADJUSTMENT values
~ change pointers to some files for workarounds

!important the interactive script still needs updates
!important this was done using old openlane v0.22 and its matching
pdk
!important known workarounds:
- a custom techlef is used where large metal spacing rules are the
only ones present to avoid violations by the router
- some odd behaviour happening when a macro has a lef view
with a non zero origin. so the power routing cell is (temporarily)
modified to have a zero origin and its placement has been shifted
which doesn't match the power routing mag.
- the old openlane doesn't generate multi spef corners. they
are generated using timing-scripts repo
2022-10-10 04:51:05 -07:00
..
hexdigits Corrected DRC errors on the non-Manhattan edges of the caravel 2021-12-03 22:21:06 -05:00
primitives Added the files for the simple_por block design, and placed the latest 2021-11-15 10:34:52 -05:00
.magicrc Numerous bug fixes, ending in clean full LVS for both caravel and caravan. (#76) 2022-04-19 19:05:27 -07:00
advSeal_6um_gen.mag add files for seal ring 2021-12-01 22:35:39 -08:00
caravan.mag Merge branch 'caravel_redesign' into make_CSB_a_pullup 2022-10-05 10:18:35 -04:00
caravan_logo.mag Made updates to correct LVS errors in caravan. Found one major error in the RTL 2021-11-22 22:35:52 -05:00
caravan_motto.mag Added a motto for each chip. Just because. 2021-11-23 15:19:41 -05:00
caravan_power_routing.mag Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) 2022-05-08 22:51:29 -07:00
caravan_power_routing_orig.mag Made updates to correct LVS errors in caravan. Found one major error in the RTL 2021-11-22 22:35:52 -05:00
caravan_signal_routing.mag Caravan top lvs (#67) 2022-04-14 15:05:16 -07:00
caravel.mag reharden!: caravel 2022-10-10 04:51:05 -07:00
caravel_clocking.mag Corrected the placement of the isosub layer in the layouts so that 2021-12-24 22:22:23 -05:00
caravel_logo.mag Corrected DRC errors on the non-Manhattan edges of the caravel 2021-12-03 22:21:06 -05:00
caravel_motto.mag Added a motto for each chip. Just because. 2021-11-23 15:19:41 -05:00
caravel_power_routing.mag Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) 2022-05-08 22:51:29 -07:00
chip_io.mag Updated all views of chip_io and chip_io_alt based on the abstract 2022-10-09 14:20:43 -04:00
chip_io_alt.mag Updated all views of chip_io and chip_io_alt based on the abstract 2022-10-09 14:20:43 -04:00
chip_io_gpio_connects.mag Updated all views of chip_io and chip_io_alt based on the abstract 2022-10-09 14:20:43 -04:00
constant_block.mag added constant_block view 2022-10-08 12:05:53 -07:00
copyright_block.mag updates to top level caravel (#59) 2022-04-08 09:31:33 -07:00
copyright_block_a.mag Caravan top lvs (#67) 2022-04-14 15:05:16 -07:00
digital_pll.mag Corrected the placement of the isosub layer in the layouts so that 2021-12-24 22:22:23 -05:00
gpio_control_block.mag reharden!: gpio_control_block 2022-10-07 05:02:14 -07:00
gpio_control_power_routing.mag Start of power routing. 2021-11-20 18:04:43 -05:00
gpio_control_power_routing_right.mag Updates for LVS. Only LVS issue remaining for caravel is how to get the 2021-11-22 12:00:55 -05:00
gpio_control_power_routing_top.mag Modifications done as part of LVS on the caravel top level. 2021-11-21 22:07:16 -05:00
gpio_defaults_block.mag Corrected DRC errors on the non-Manhattan edges of the caravel 2021-12-03 22:21:06 -05:00
gpio_defaults_block_0403.mag fixed caravel netlist to use the 1803 defaults block (#94) 2022-05-03 10:36:11 -07:00
gpio_defaults_block_1803.mag fixed caravel netlist to use the 1803 defaults block (#94) 2022-05-03 10:36:11 -07:00
gpio_logic_high.mag Changed "simple_por" in both caravel and caravan to be an abstract 2021-11-27 11:51:30 -05:00
housekeeping.mag rehardened housekeeping after rtl update, and fixed all hold and transition violations. 2022-10-07 16:59:01 -07:00
mgmt_core_wrapper.mag Updated caravel and caravan layouts to reflect the simple change 2021-11-30 10:05:43 -05:00
mgmt_core_wrapper_orig.mag Updated caravel and caravan layouts to reflect the simple change 2021-11-30 10:05:43 -05:00
mgmt_protect.mag rehardeneded mgmt_protect 2022-10-05 12:26:24 -07:00
mgmt_protect_hv.mag Corrected the placement of the isosub layer in the layouts so that 2021-12-24 22:22:23 -05:00
mprj2_logic_high.mag Caravan top lvs (#67) 2022-04-14 15:05:16 -07:00
mprj_logic_high.mag Caravan top lvs (#67) 2022-04-14 15:05:16 -07:00
seal_ring_corner_abstract.mag add files for seal ring 2021-12-01 22:35:39 -08:00
simple_por.mag Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) 2022-05-08 22:51:29 -07:00
spare_logic_block.mag Changed "simple_por" in both caravel and caravan to be an abstract 2021-11-27 11:51:30 -05:00
user_analog_project_wrapper.mag Changed the user project wrapper and user analog project wrapper 2021-12-07 22:21:49 -05:00
user_id_programming.mag Numerous bug fixes, ending in clean full LVS for both caravel and caravan. (#76) 2022-04-19 19:05:27 -07:00
user_id_textblock.mag Made updates to correct LVS errors in caravan. Found one major error in the RTL 2021-11-22 22:35:52 -05:00
user_project_wrapper.mag Changed the user project wrapper and user analog project wrapper 2021-12-07 22:21:49 -05:00
xres_buf.mag updates to top level caravel (#59) 2022-04-08 09:31:33 -07:00