9 Commits

Author	SHA1	Message	Date
Tim Edwards	515b5a54f2	Updates for LVS. Only LVS issue remaining for caravel is how to get the ... ground domains to extract independently.	2021-11-22 12:00:55 -05:00
Tim Edwards	6eb8bb54de	Several more LVS corrections, including fixing a label in chip_io that ... got removed from its net by a chang in the LEF view of an I/O pad, and a lack of declaration of an array to attach to pwr_ctrl_out in the verilog, which is valid verilog but netgen can't know the bus size without the no-connect net being declared. The remaining issue has to do with separation of ground domains in the mgmt_protect block.	2021-11-21 22:58:39 -05:00
Tim Edwards	5262f35610	Modifications done as part of LVS on the caravel top level.	2021-11-21 22:07:16 -05:00
manarabdelaty	5cd3843f00	[DATA] Update gpio_control_block (li1 used 2um)	2021-11-20 14:43:20 +02:00
manarabdelaty	bf6ad67934	[DATA] Update gpio_control_block pin order to fix shorts at the top level	2021-11-19 13:13:24 +02:00
manarabdelaty	49c506f052	Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency	2021-11-05 18:36:43 +02:00
manarabdelaty	e68664101c	Update gpio_control_block	2021-11-05 16:54:55 +02:00
manarabdelaty	78ce7265c1	Update gpio_control block	2021-11-04 17:58:58 +02:00
manarabdelaty	cb9990f97e	harden gpio_control_block	2021-11-04 16:19:12 +02:00