562405a302
Fix upstream breakage due to missing docker mount ( #80 )
2022-04-21 05:34:37 -07:00
71600440bc
Caravan top lvs ( #67 )
...
* - update caravan configuration
* change correct gpio_default blocks instance names
* implement powerrouting work around
* place spare logic blocks
* keep the history of runs and sym link last/final one
* - update caravan mag, def and gl views
- add fake power routing cell in the rtl as a placeholder for openlane
to prevent routing on that cell
- fix some syntax errors in chip_io_alt
- match simple_por lef pins with mag by regenerating it
* Apply automatic changes to Manifest and README.rst
* add caravan power routing lef
* - update mag and def view of caravan
- add_macro_placement for fake cell
* Added back the power routing to Caravan, fixed DRC errors, ran LVS,
corrected placement of isolated substrate regions, and replaced the
signal routing for the analog lines. Be aware that merging with
main may cause issues with the mgmt_protect.mag file and its
subcells mprj2_logic_high.mag and mprj_logic_high.mag. It may be
worth cherry-picking the files to merge and exclude those layouts.
Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: kareefardi <kareefardi@users.noreply.github.com>
Co-authored-by: Jeff DiCorpo <42048757+jeffdi@users.noreply.github.com>
2022-04-14 15:05:16 -07:00
b707fbd9b9
Update Makefile ( #65 )
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fix openlane/Makefile to work around pdk version check
2022-04-13 12:38:06 -07:00
456f49da48
Update Makefile ( #62 )
2022-04-11 21:18:36 -07:00
2957357ce5
avoid pdk version checking in openlane ( #61 )
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* Update Makefile
Update to workaround pdk version matching in Openlane
* Update Makefile
updated OPENLANE_TAG
2022-04-11 16:38:49 -07:00
e9f023f9fa
Introduction of PDK variable ( #39 )
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* added PDK_VARIENT variable
* changed variable name to PDK
* resolve issue
Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
2022-04-08 09:05:58 -07:00
449cb47360
fix comment typo
2022-02-25 10:47:04 -08:00
0f04a43f58
- change litex tag to mpw-5c
...
- warn before deleting when rerunning these targets:
install_mcw openlane pdk
- clone litex with depth=1 and single branch
- simplified pdk targets by removing these targets:
skywater-timing build-pdk skywater-library
- add clean-pdk and clean-openlane
- add make prerequisites in pdk (not sure if that's needed)
- run openlane docker non interactive
- export OPENLANE_IMAGE_NAME when running openlane docker
- add check-openlane-env target
Squashed commit of the following:
commit b7904e08ae8507bcf1ee12114e08d21a15d4646aaddf24a8b691a305f36500c249db5cba14b7a6aaf5657bbabf0fc8c4dacdc875a7b058801b3dcff403f5801b3dc28d47091c6fba67a49b0aa2
2022-02-25 10:39:11 -08:00
89629b357f
Change `make openlane` to `make pull-openlane` in the OpenLane Target
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Merging the image from scratch doesn't work anymore due to a dependency break.
Also, add pdk-with-sram target.
2022-02-03 18:10:53 +00:00
05278ec738
[DATA] Update HK views (timing clean)
2021-11-25 12:54:22 +02:00
38f64d08a3
[DATA] Add user_analog_project_wrapper and chip_io_alt gds/lef views
2021-11-22 23:08:25 +02:00
72b2c724c9
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00
Anton Blanchard
R. Timothy Edwards
Jeff DiCorpo
Marwan Abbas
kareem
Donn
manarabdelaty