Grant Brown
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f5e5372187
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Merge branch 'master' into documenation
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2021-04-04 14:30:43 -06:00 |
tangxifan
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9266b0fd1f
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[Doc] Update SOFA CHD timing in documentation
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2021-04-03 17:47:55 -06:00 |
Grant Brown
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f5de2c4b63
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Updated rst index tree
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2021-04-03 16:25:35 -06:00 |
tangxifan
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acf1d10a00
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[Doc] Update timing in documentation
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2021-04-03 14:34:02 -06:00 |
tangxifan
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c4487d6e10
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[Doc] Add timing for QLSOFA and SOFA CHD
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2021-04-02 20:48:58 -06:00 |
tangxifan
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ea1113917f
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[Doc] Add routing architecture details to qlsofa
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2021-04-02 18:56:14 -06:00 |
tangxifan
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0838b48dec
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[Doc] Add timing and detailed routing arch to documentation
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2021-04-02 18:46:43 -06:00 |
GrantBrown1994
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166ea43d96
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Custom cell documentation added
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2021-04-01 21:42:42 -06:00 |
Tim Ansell
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286ebc7da2
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Fix spelling of floorplan.
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2021-02-13 14:05:46 -08:00 |
tangxifan
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851aa6e07d
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[Doc] Minor fix on the waveform display for I/O circuitry
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2021-01-15 17:08:10 -07:00 |
tangxifan
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b38a948a56
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[Doc] Add testing waveform example to documentation
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2020-12-11 17:24:28 -07:00 |
tangxifan
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88f522026a
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[Doc] Update I/O schematic to be consistent with HDL netlist
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2020-12-11 11:25:28 -07:00 |
tangxifan
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9dc1b6efa7
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[Doc] Fine tune documentation on I/O design
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2020-12-11 11:25:07 -07:00 |
tangxifan
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abd51929f9
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[Doc] Add MUX design information to documentation
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2020-12-09 17:51:15 -07:00 |
tangxifan
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9f82ac7636
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[Doc] Add SOFA CHD to documentation. Clean up redundant document between HD FPGA IPs
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2020-12-09 16:18:04 -07:00 |
tangxifan
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156e1d007c
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[Doc] Add missing figure and bug fix
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2020-12-04 13:34:41 -07:00 |
tangxifan
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1948f000e0
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[Doc] Reorganize documentation for SOFA HD device family
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2020-12-04 12:02:30 -07:00 |