8 Commits

Author	SHA1	Message	Date
tangxifan	acf1d10a00	[Doc] Update timing in documentation	2021-04-03 14:34:02 -06:00
tangxifan	c4487d6e10	[Doc] Add timing for QLSOFA and SOFA CHD	2021-04-02 20:48:58 -06:00
tangxifan	ea1113917f	[Doc] Add routing architecture details to qlsofa	2021-04-02 18:56:14 -06:00
Tim Ansell	286ebc7da2	Fix spelling of floorplan.	2021-02-13 14:05:46 -08:00
tangxifan	abd51929f9	[Doc] Add MUX design information to documentation	2020-12-09 17:51:15 -07:00
tangxifan	9f82ac7636	[Doc] Add SOFA CHD to documentation. Clean up redundant document between HD FPGA IPs	2020-12-09 16:18:04 -07:00
tangxifan	156e1d007c	[Doc] Add missing figure and bug fix	2020-12-04 13:34:41 -07:00
tangxifan	1948f000e0	[Doc] Reorganize documentation for SOFA HD device family	2020-12-04 12:02:30 -07:00