Ganesh Gore
|
d7f36a1f70
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[SOFA-CHD] Updated SOFA-CHD - Updated cells - DRC Clean
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2020-12-16 15:00:15 -07:00 |
Ganesh Gore
|
9f9897c5e2
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[SOFA-CHD] Updated design with mux-primitive bug fixed - Calibre DRC pending
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2020-12-14 00:34:42 -07:00 |
Ganesh Gore
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0672f01e3a
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[Cleanup] Removed unused SDCs
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2020-12-14 00:31:03 -07:00 |
Ganesh Gore
|
77bb6d4eae
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[SOFA_CHD] Added Verification results
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2020-12-09 00:55:27 -07:00 |
Ganesh Gore
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45ff6d2dfe
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[SOFA_CHD] Added post-pnr netlist, Verified CCFF/SCFF
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2020-12-09 00:54:03 -07:00 |
Ganesh Gore
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1a2e6de718
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[SOFA_CHD] Removed large testbench file
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2020-12-09 00:51:30 -07:00 |
Ganesh Gore
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9284bbf8fa
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[SOFA_CHD] Added OpenFPGA taks and verilog netlist
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2020-12-09 00:49:00 -07:00 |