18 Commits

Author	SHA1	Message	Date
Grant Brown	17c2046d17	Figure and hyperlink updates for Custom Cells Documentation	2021-04-05 17:50:06 -06:00
Grant Brown	f5e5372187	Merge branch 'master' into documenation	2021-04-04 14:30:43 -06:00
tangxifan	9266b0fd1f	[Doc] Update SOFA CHD timing in documentation	2021-04-03 17:47:55 -06:00
Grant Brown	f5de2c4b63	Updated rst index tree	2021-04-03 16:25:35 -06:00
tangxifan	acf1d10a00	[Doc] Update timing in documentation	2021-04-03 14:34:02 -06:00
tangxifan	c4487d6e10	[Doc] Add timing for QLSOFA and SOFA CHD	2021-04-02 20:48:58 -06:00
tangxifan	ea1113917f	[Doc] Add routing architecture details to qlsofa	2021-04-02 18:56:14 -06:00
tangxifan	0838b48dec	[Doc] Add timing and detailed routing arch to documentation	2021-04-02 18:46:43 -06:00
GrantBrown1994	166ea43d96	Custom cell documentation added	2021-04-01 21:42:42 -06:00
Tim Ansell	286ebc7da2	Fix spelling of floorplan.	2021-02-13 14:05:46 -08:00
tangxifan	851aa6e07d	[Doc] Minor fix on the waveform display for I/O circuitry	2021-01-15 17:08:10 -07:00
tangxifan	b38a948a56	[Doc] Add testing waveform example to documentation	2020-12-11 17:24:28 -07:00
tangxifan	88f522026a	[Doc] Update I/O schematic to be consistent with HDL netlist	2020-12-11 11:25:28 -07:00
tangxifan	9dc1b6efa7	[Doc] Fine tune documentation on I/O design	2020-12-11 11:25:07 -07:00
tangxifan	abd51929f9	[Doc] Add MUX design information to documentation	2020-12-09 17:51:15 -07:00
tangxifan	9f82ac7636	[Doc] Add SOFA CHD to documentation. Clean up redundant document between HD FPGA IPs	2020-12-09 16:18:04 -07:00
tangxifan	156e1d007c	[Doc] Add missing figure and bug fix	2020-12-04 13:34:41 -07:00
tangxifan	1948f000e0	[Doc] Reorganize documentation for SOFA HD device family	2020-12-04 12:02:30 -07:00