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SOFA
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558 Commits 16 Branches 1 Tag 1.8 GiB
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9 Commits

Author SHA1 Message Date
Ganesh Gore 55acf06335 Updated design with new GDS nad updated verilog netlist 2020-12-20 03:31:26 -07:00
Ganesh Gore da4ae780a9 [Cleanup] Converted .spef to .spef.gz 2020-12-20 02:10:51 -07:00
Ganesh Gore d7f36a1f70 [SOFA-CHD] Updated SOFA-CHD - Updated cells - DRC Clean 2020-12-16 15:00:15 -07:00
Ganesh Gore 9f9897c5e2 [SOFA-CHD] Updated design with mux-primitive bug fixed - Calibre DRC pending 2020-12-14 00:34:42 -07:00
Ganesh Gore 0672f01e3a [Cleanup] Removed unused SDCs 2020-12-14 00:31:03 -07:00
Ganesh Gore 77bb6d4eae [SOFA_CHD] Added Verification results 2020-12-09 00:55:27 -07:00
Ganesh Gore 45ff6d2dfe [SOFA_CHD] Added post-pnr netlist, Verified CCFF/SCFF 2020-12-09 00:54:03 -07:00
Ganesh Gore 1a2e6de718 [SOFA_CHD] Removed large testbench file 2020-12-09 00:51:30 -07:00
Ganesh Gore 9284bbf8fa [SOFA_CHD] Added OpenFPGA taks and verilog netlist 2020-12-09 00:49:00 -07:00