4 Commits

Author	SHA1	Message	Date
romangauchi	bc43b6b9b3	[SOFA_PLUS] remove 'the task.conf', which must be generated with the 'make runOpenFPGA' command	2022-02-04 13:27:45 -07:00
romangauchi	250aafe02d	[SOFA_PLUS] fix the default OpenFPGA task testbench/simulation	2022-01-30 22:29:32 -07:00
tangxifan	56dd34da86	[Script] Update script due to deprecation of 'write_verilog_testbench'	2021-06-09 19:43:28 -06:00
Ganesh Gore	950e4c8cf0	[SOFA_PLUS] Project setup	2021-05-31 12:42:56 -06:00