OpenFPGA/openfpga_flow
tangxifan f833e0ec66 add a flagship architecture using fracturable memory and dsp 2020-08-17 17:49:51 -06:00
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OpenFPGAShellScripts add regression test to track runtime on big fpga devices using practical benchmarks 2020-07-28 12:38:42 -06:00
SpiceNetlists Moved spice and verilog netlist folder location 2019-08-17 01:49:49 -06:00
VerilogNetlists update arch to support reset signal for SRAm 2020-06-11 19:31:14 -06:00
arch_bitstreams add load architecture bitstream test case and reorganize regression tests in category of openfpga tools 2020-07-27 15:54:46 -06:00
benchmarks add regression test to track runtime on big fpga devices using practical benchmarks 2020-07-28 12:38:42 -06:00
docs Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00
fabric_keys update fabric key to synchronize with new module/instance naming 2020-07-24 12:55:40 -06:00
misc Fixed modelsim include references 2020-06-11 19:28:13 -06:00
openfpga_arch add a flagship architecture using fracturable memory and dsp 2020-08-17 17:49:51 -06:00
openfpga_simulation_settings add example simulation setting for openfpga flow 2020-06-11 19:31:15 -06:00
scripts BugFix : Flow script accepts extra OpenFPGA arguments 2020-07-27 18:10:43 -06:00
tasks add README to explain the organization of regression tests 2020-07-28 13:44:06 -06:00
tech Added Power Model Files 2019-08-19 18:55:23 -06:00
vpr_arch add a flagship architecture using fracturable memory and dsp 2020-08-17 17:49:51 -06:00
.gitignore Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00