OpenFPGA/vpr7_x2p/vpr/SRC
tangxifan 3a490fdd59 bug fixing on the port map alignment 2019-08-06 14:17:56 -06:00
..
base Update documentation and help 2019-07-15 21:16:15 -06:00
device/rr_graph bug fixed for the tileable RR graph generator for heterogeneous blocks 2019-07-11 21:02:09 -06:00
fpga_x2p bug fixing on the port map alignment 2019-08-06 14:17:56 -06:00
mrfpga cleaned unused variables 2019-05-13 14:45:02 -06:00
pack cleaned unused variables 2019-05-13 14:45:02 -06:00
place add option to compact tileable routing arch 2019-07-04 17:13:34 -06:00
power bug fixing for memory leaking in allocating pb_rr_graph and power estimation 2019-06-15 12:23:36 -06:00
route add option to compact tileable routing arch 2019-07-04 17:13:34 -06:00
timing rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
util basically finished the coding of tileable rr_graph generator. testing to go 2019-06-20 18:17:07 -06:00
ctags_vpr_src.sh add option to compact tileable routing arch 2019-07-04 17:13:34 -06:00
main.c cleaned unused variables 2019-05-13 14:45:02 -06:00
shell_main.c Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00