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add option to compact tileable routing arch

This commit is contained in:
tangxifan 2019-07-04 17:13:34 -06:00
parent c8ceb8f7d5
commit 3077efa74f
14 changed files with 36 additions and 11 deletions
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1
vpr7_x2p/libarchfpga/SRC/include/physical_types.h
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@ -936,6 +936,7 @@ struct s_arch {
float R_minW_pmos;
int Fs;
int SubFs;
boolean wire_opposite_side;
float C_ipin_cblock;
float T_ipin_cblock;
/* mrFPGA: Xifan TANG */

8
vpr7_x2p/libarchfpga/SRC/read_xml_arch_file.c
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@ -23,8 +23,8 @@
***********************************************************************/
/************************************************************************
* Filename: rr_blocks.cpp
* Created by: Xifan Tang
* Filename: read_xml_arch_file.c
* Created by: Jason Luu
* Change history:
* +-------------------------------------+
* | Date | Author | Notes
@ -2200,6 +2200,10 @@ static void ProcessDevice(INOUTP ezxml_t Node, OUTP struct s_arch *arch,
/* By default, the subFs is the same as the main Fs */
arch->SubFs = GetIntProperty(Cur, "sub_fs", FALSE, arch->Fs);
/* A switch to allow passing tracks wired to the same routing channels */
arch->wire_opposite_side = GetBooleanProperty(Cur, "wire_opposite_side", FALSE, FALSE);
ezxml_set_attr(Cur, "wire_opposite_side", NULL);
FreeNode(Cur);
}

1
vpr7_x2p/vpr/SRC/base/SetupVPR.c
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@ -541,6 +541,7 @@ static void SetupRoutingArch(INP t_arch Arch,
RoutingArch->R_minW_pmos = Arch.R_minW_pmos;
RoutingArch->Fs = Arch.Fs;
RoutingArch->sub_Fs = Arch.SubFs;
RoutingArch->wire_opposite_side = Arch.wire_opposite_side;
RoutingArch->directionality = BI_DIRECTIONAL;
if (Arch.Segments)
RoutingArch->directionality = Arch.Segments[0].directionality;

1
vpr7_x2p/vpr/SRC/base/place_and_route.c
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@ -606,6 +606,7 @@ static int binary_search_place_and_route(struct s_placer_opts placer_opts,
chan_width_x[0], NULL,
det_routing_arch.switch_block_type, det_routing_arch.Fs,
det_routing_arch.switch_block_sub_type, det_routing_arch.sub_Fs,
det_routing_arch.wire_opposite_side,
det_routing_arch.num_segment,
det_routing_arch.num_switch, segment_inf,
det_routing_arch.global_route_switch,

1
vpr7_x2p/vpr/SRC/base/vpr_types.h
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@ -810,6 +810,7 @@ struct s_det_routing_arch {
int Fs;
enum e_switch_block_type switch_block_type;
int sub_Fs;
boolean wire_opposite_side;
enum e_switch_block_type switch_block_sub_type;
int num_segment;
short num_switch;

2
vpr7_x2p/vpr/SRC/ctags_vpr_src.sh
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@ -1,2 +1,2 @@
rm tags
ctags -R shell_main.c main.c ./* ../../libarchfpga/include/*.[ch] ../../libarchfpga/fpga_spice_include/*.[ch] ../../libarchfpga/*.[ch] ../../pcre/SRC/*.[ch] ../../libarchfpga/SRC/include/*.[ch]
ctags -R shell_main.c main.c ./* ../../libarchfpga/SRC/include/*.[ch] ../../libarchfpga/SRC/fpga_spice_include/*.[ch] ../../libarchfpga/SRC/*.[ch] ../../pcre/SRC/*.[ch]

10
vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_builder.cpp
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@ -780,7 +780,8 @@ void build_rr_graph_edges(t_rr_graph* rr_graph,
const std::vector<t_segment_inf> segment_inf,
int** Fc_in, int** Fc_out,
const enum e_switch_block_type sb_type, const int Fs,
const enum e_switch_block_type sb_subtype, const int subFs) {
const enum e_switch_block_type sb_subtype, const int subFs,
const bool wire_opposite_side) {
/* Create edges for SOURCE and SINK nodes for a tileable rr_graph */
build_rr_graph_edges_for_source_nodes(rr_graph, grids);
@ -807,7 +808,9 @@ void build_rr_graph_edges(t_rr_graph* rr_graph,
/* adapt the switch_block_conn for the GSB nodes */
t_track2track_map sb_conn; /* [0..from_gsb_side][0..chan_width-1][track_indices] */
sb_conn = build_gsb_track_to_track_map(rr_graph, rr_gsb, sb_type, Fs, sb_subtype, subFs, segment_inf);
sb_conn = build_gsb_track_to_track_map(rr_graph, rr_gsb,
sb_type, Fs, sb_subtype, subFs, wire_opposite_side,
segment_inf);
/* Build edges for a GSB */
build_edges_for_one_tileable_rr_gsb(rr_graph, &rr_gsb,
@ -908,6 +911,7 @@ void build_tileable_unidir_rr_graph(INP const int L_num_types,
INP struct s_grid_tile **L_grid, INP const int chan_width,
INP const enum e_switch_block_type sb_type, INP const int Fs,
INP const enum e_switch_block_type sb_subtype, INP const int subFs,
INP const boolean wire_opposite_side,
INP const int num_seg_types,
INP const t_segment_inf * segment_inf,
INP const int num_switches, INP const int delayless_switch,
@ -1025,7 +1029,7 @@ void build_tileable_unidir_rr_graph(INP const int L_num_types,
/* Create edges for a tileable rr_graph */
build_rr_graph_edges(&rr_graph, device_size, grids, device_chan_width, segment_infs,
Fc_in, Fc_out,
sb_type, Fs, sb_subtype, subFs);
sb_type, Fs, sb_subtype, subFs, (bool)wire_opposite_side);
/************************************************************************
* 6.2 Build direction connection lists

1
vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_builder.h
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@ -12,6 +12,7 @@ void build_tileable_unidir_rr_graph(INP const int L_num_types,
INP struct s_grid_tile **L_grid, INP const int chan_width,
INP const enum e_switch_block_type sb_type, INP const int Fs,
INP const enum e_switch_block_type sb_subtype, INP const int subFs,
INP const boolean wire_opposite_side,
INP const int num_seg_types,
INP const t_segment_inf * segment_inf,
INP const int num_switches, INP const int delayless_switch,

12
vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_gsb.cpp
View File

@ -357,6 +357,7 @@ void build_gsb_one_group_track_to_track_map(const t_rr_graph* rr_graph,
const RRGSB& rr_gsb,
const enum e_switch_block_type sb_type,
const int Fs,
const bool wire_opposite_side,
const t_track_group from_tracks, /* [0..gsb_side][track_indices] */
const t_track_group to_tracks, /* [0..gsb_side][track_indices] */
t_track2track_map* track2track_map) {
@ -387,7 +388,11 @@ void build_gsb_one_group_track_to_track_map(const t_rr_graph* rr_graph,
if (from_side == to_side) {
continue;
}
/* Bypass those from_side is opposite to to_side if required */
if ( (true == wire_opposite_side)
&& (to_side_manager.get_opposite() == from_side) ) {
continue;
}
/* Get other track_ids depending on the switch block pattern */
/* Find the track ids that will start at the other sides */
std::vector<size_t> to_track_ids = get_switch_block_to_track_id(sb_type, Fs, from_side, inode,
@ -477,6 +482,7 @@ t_track2track_map build_gsb_track_to_track_map(const t_rr_graph* rr_graph,
const int Fs,
const enum e_switch_block_type sb_subtype,
const int subFs,
const bool wire_opposite_side,
const std::vector<t_segment_inf> segment_inf) {
t_track2track_map track2track_map; /* [0..gsb_side][0..chan_width][track_indices] */
@ -549,7 +555,8 @@ t_track2track_map build_gsb_track_to_track_map(const t_rr_graph* rr_graph,
/* For Group 1: we build connections between end_tracks and start_tracks*/
build_gsb_one_group_track_to_track_map(rr_graph, rr_gsb,
sb_type, Fs,
end_tracks, start_tracks,
true, /* End tracks should always to wired to start tracks */
end_tracks, start_tracks,
&track2track_map);
/* For Group 2: we build connections between end_tracks and start_tracks*/
@ -558,6 +565,7 @@ t_track2track_map build_gsb_track_to_track_map(const t_rr_graph* rr_graph,
*/
build_gsb_one_group_track_to_track_map(rr_graph, rr_gsb,
sb_subtype, subFs,
wire_opposite_side, /* Pass tracks may not be wired to start tracks */
pass_tracks, start_tracks,
&track2track_map);

1
vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_gsb.h
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@ -25,6 +25,7 @@ t_track2track_map build_gsb_track_to_track_map(const t_rr_graph* rr_graph,
const int Fs,
const enum e_switch_block_type sb_subtype,
const int subFs,
const bool wire_opposite_side,
const std::vector<t_segment_inf> segment_inf);
RRGSB build_one_tileable_rr_gsb(const DeviceCoordinator& device_range,

1
vpr7_x2p/vpr/SRC/place/timing_place_lookup.c
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@ -462,6 +462,7 @@ static void alloc_routing_structs(struct s_router_opts router_opts,
chan_width_x[0], NULL,
det_routing_arch.switch_block_type, det_routing_arch.Fs,
det_routing_arch.switch_block_sub_type, det_routing_arch.sub_Fs,
det_routing_arch.wire_opposite_side,
det_routing_arch.num_segment,
det_routing_arch.num_switch, segment_inf,
det_routing_arch.global_route_switch,

1
vpr7_x2p/vpr/SRC/route/route_common.c
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@ -300,6 +300,7 @@ boolean try_route(int width_fac, struct s_router_opts router_opts,
chan_width_x[0], NULL,
det_routing_arch.switch_block_type, det_routing_arch.Fs,
det_routing_arch.switch_block_sub_type, det_routing_arch.sub_Fs,
det_routing_arch.wire_opposite_side,
det_routing_arch.num_segment,
det_routing_arch.num_switch, segment_inf,
det_routing_arch.global_route_switch,

5
vpr7_x2p/vpr/SRC/route/rr_graph.c
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@ -213,7 +213,8 @@ void build_rr_graph(INP t_graph_type graph_type, INP int L_num_types,
INP struct s_grid_tile **L_grid, INP int chan_width,
INP struct s_chan_width_dist *chan_capacity_inf,
INP enum e_switch_block_type sb_type, INP int Fs,
INP enum e_switch_block_type sb_sub_type, INP int sub_Fs, INP int num_seg_types,
INP enum e_switch_block_type sb_sub_type, INP int sub_Fs, INP boolean wire_opposite_side,
INP int num_seg_types,
INP int num_switches, INP t_segment_inf * segment_inf,
INP int global_route_switch, INP int delayless_switch,
INP t_timing_inf timing_inf, INP int wire_to_ipin_switch,
@ -228,7 +229,7 @@ void build_rr_graph(INP t_graph_type graph_type, INP int L_num_types,
L_nx, L_ny, L_grid,
chan_width,
sb_type, Fs,
sb_sub_type, sub_Fs,
sb_sub_type, sub_Fs, wire_opposite_side,
num_seg_types, segment_inf,
num_switches, delayless_switch,
timing_inf, wire_to_ipin_switch,

2
vpr7_x2p/vpr/SRC/route/rr_graph.h
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@ -28,7 +28,7 @@ void build_rr_graph(INP t_graph_type graph_type,
INP struct s_chan_width_dist *chan_capacity_inf,
INP enum e_switch_block_type sb_type,
INP int Fs,
INP enum e_switch_block_type sb_sub_type, INP int sub_Fs,
INP enum e_switch_block_type sb_sub_type, INP int sub_Fs, INP boolean wire_opposite_side,
INP int num_seg_types,
INP int num_switches,
INP t_segment_inf * segment_inf,