OpenFPGA/openfpga_flow
Aram Kostanyan 397f2e71f1 Added 'basic_tests/explicit_multi_verilog_files' task and deployed it to CI. Reverted previous commit chenges in 'benchmark_sweep/iwls2005' task. 2022-01-19 20:43:26 +05:00
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arch_bitstreams [Architecture] Update external bitstream 2020-09-25 21:30:59 -06:00
benchmarks [Benchmark] Add pipelined multiplier benchmark to test DSP block with registers 2022-01-02 20:16:59 -08:00
docs Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00
fabric_keys [Arch] Add an example fabric key that models a shift-register-based QuickLogic memory bank using custom chain organization 2021-10-11 09:49:22 -07:00
misc Changed HDL files reading to be as a single compilation unit in yosys_vpr flow for Verific mode. Changed '' variable to 'read_verilog ' in yosys template scripts. Updated task configs accordingly. 2022-01-17 13:21:29 +05:00
openfpga_arch [Flow] Add openfpga arch for DSP with registers 2022-01-02 19:59:33 -08:00
openfpga_cell_library Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into upstream 2021-10-31 11:51:34 -07:00
openfpga_shell_scripts Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into upstream 2021-10-31 11:51:34 -07:00
openfpga_simulation_settings [Script] Bug fix in slow clock frequency in shift register chain contraints 2021-10-06 16:49:01 -07:00
openfpga_yosys_techlib [Script] Add dff with active-low async reset to default yosys tech lib 2021-07-02 11:17:43 -06:00
regression_test_scripts Added 'basic_tests/explicit_multi_verilog_files' task and deployed it to CI. Reverted previous commit chenges in 'benchmark_sweep/iwls2005' task. 2022-01-19 20:43:26 +05:00
scripts Merge branch 'master' into issue-483 2022-01-18 13:38:12 +05:00
tasks Added 'basic_tests/explicit_multi_verilog_files' task and deployed it to CI. Reverted previous commit chenges in 'benchmark_sweep/iwls2005' task. 2022-01-19 20:43:26 +05:00
tech Added Power Model Files 2019-08-19 18:55:23 -06:00
vpr_arch [Arch] Patched VPR arch 2022-01-02 20:47:22 -08:00
.gitignore Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00