Ganesh Gore 53941eaf5c Changed yosys output file name		2019-08-19 19:06:46 -06:00
..
pro_blif.pl	Moved required files to openfpga folder	2019-08-19 18:57:42 -06:00
run_fpga_flow.py	Changed yosys output file name	2019-08-19 19:06:46 -06:00
run_fpga_task.conf	First draft: Working openfpga task flow	2019-08-16 09:44:50 -06:00
run_fpga_task.py	Code re-arrangement	2019-08-18 12:26:05 -06:00